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Home > Processor/DSP > Everything You Need to Know about Voltage Regulator Module (VRM)

Everything You Need to Know about Voltage Regulator Module (VRM)

Update Time: 2023-12-05 14:12:12


VRM, an abbreviation for voltage regulator module, is a crucial component employed in contemporary CPUs and GPUs, commonly known as graphics cards. Its primary function is to manage and reduce the voltage (V) supplied to these components, preventing them from surpassing their designated maximum voltage thresholds. The significance of VRMs becomes particularly pronounced when overclocking a CPU or GPU. Theoretically, VRMs aim to ensure a consistent and stable power supply to the components. Functioning as buck converters, VRMs operate as DC-to-DC power converters. This article will provide a comprehensive guide to the Voltage Regulator Module(VRMs).

What's a Voltage Regulator Module (VRM)?

A voltage regulator module (VRM), also known as a processor power module (PPM), is a specialized point-of-load (PoL) power converter exhibiting characteristics of a buck converter like other PoLs. Tailored for converting a 5V or 12V bus to a precise voltage essential for powering central processing units (CPUs) or graphics processing units (GPUs) in computers or servers, VRMs cater to the specific requirements of CPUs and GPUs. These requirements encompass low noise margins, stable voltage regulation, and swift dynamic response.

Voltage Regulator Module.jpg

Typically adopting a multiphase synchronous buck design, VRMs integrate a low-side synchronous MOSFET and an inductor to provide feedback for regulation. Large capacitor banks are commonly present in VRMs to stabilize the voltage and accommodate the dynamic power demands of the CPU/GPU.

A multiphase VRM comprises parallel buck power stages (phases), each equipped with its own inductor and power MOSFETs, collectively governed by a single controller. It distinguishes itself from a PoL. A VRM controller manages the power stages and communicates with the CPU/GPU. Multiphase VRMs can incorporate 12 or more phases sharing input and output capacitors. The interleaved arrangement ensures switching at intervals equal to 360° / n throughout the switching period, where n represents the total number of phases. The number of phases increases with the required load current, and interleaving more phases effectively enhances the converter's operating frequency.

Multiphase VRM topology.jpg

Multiphase VRM topology

Three-phase VRM showing the interleaved output.jpg

Three-phase VRM showing the interleaved output

VRMs manifest in diverse physical forms, ranging from discrete components on the motherboard to separate modules that plug into dedicated connectors. Some are integrated directly into the CPU/GPU, exemplified by Intel Haswell CPUs featuring voltage-regulation components on the same package, known as a fully integrated voltage regulator (FIVR) or integrated voltage regulator (IVR). FIVRs and IVRs simplify the intricate implementation of voltage regulation, managing various CPU/GPU supply voltages and dynamically powering up and down different areas of a CPU/GPU.

Voltage Regulator Module Function

VRMs communicate with CPUs

Various protocols are established to facilitate communication between the VRM and the MCU, including but not limited to Intel VRM14.0, Intel mobile voltage positioning (IMVP) 8/9, and AMD SVI2 interface specifications. For instance, the AMD SVI2 interface incorporates three dedicated pins on the VRM controller:

  • SVC (Serial VID clock), which receives clock input from the processor.

  • SVD (Serial VID data), a serial data line input from the processor.

  • SVT (Serial VID telemetry), a push-pull output receiving telemetry input from the VRM.

The AMD SVI2 interface includes three dedicated pins on the VRM controller.jpg

The AMD SVI2 interface includes three dedicated pins on the VRM controller

In systems employing VRMs, the MCU communicates the required supply voltage to the VRM during startup using a set of bits known as VID. Initially, the VRM provides a standard supply voltage to the VID logic, a processor component responsible for transmitting the VID to the VRM. Once the VRM receives the VID specifying the necessary supply voltage, it transitions into a voltage regulator, ensuring a consistent voltage supply to the processor. VID functionality enables a single VRM to accommodate various CPU/GPU models. It allows the processor to interact with the VRM to reduce power consumption during low activity, idle states, or sleep modes.

VID signals can range from 4 to 8 bits. Specific VRM controllers can accept multiple VID signal bit widths, offering flexibility. For instance, a 6-bit VID allows for a 10mV output voltage step resolution. The number of bits also dictates the number of distinct voltages that can be identified; a controller with a 5-bit VID would output a maximum of 32 distinct output voltages. In specific scenarios, certain VID commands may be reserved for special functions, such as unit shutdown; thus, a 5-bit VID unit might have fewer than 32 output voltage levels.


System operating conditions often exhibit significant variability. When dealing with multi-core CPUs, the effective management of energy consumption becomes crucial. This can be achieved by swiftly modulating the supply voltage based on the immediate power requirements of individual cores. Three key techniques employed for minimizing core energy consumption are dynamic voltage scaling (DVS), adaptive voltage scaling (AVS), and dynamic voltage and frequency scaling (DVFS).

DVS power management entails adjusting the operating voltage of a core in response to specific demands. When DVS is utilized to decrease the operating voltage for energy conservation, it is known as undervolting—a practice commonly seen in laptops and tablets to extend battery life. Conversely, when DVS is applied to increase the operating voltage, it overvolts, supporting higher clock frequencies and enhanced performance. The term "overvolting" derives from the " overclocking " concept associated with running a CPU at unusually high frequencies.

AVS shares a common goal with DVS, aiming to save energy. However, AVS adapts the voltage directly to the chip's conditions. In contrast to the open-loop control of DVS, AVS employs closed-loop control, establishing direct feedback between chip performance and the supplied voltage. This enables AVS to respond to real-time power needs, chip-to-chip variations, and changes in performance over time.

Energy consumption can be reduced by clocking a core at a slower pace. DVFS is an energy-saving approach based on:

  • The linear relationship between clock frequency and power consumption and 

  • The quadratic relationship between power consumption and operating voltage (P = C × V2 × f). Lowering the clock frequency 

It reduces energy consumption and allows a core to operate at a lower voltage. DVFS offers the advantage of diminishing both dynamic and static power consumption. It can be strategically employed to maintain a core or the overall CPU within thermal limits.

The correlation between a core's operating voltage and the permissible range of frequencies defines the Operating Performance Point (OPP). The spectrum of attainable OPPs for a given system is termed the system DVFS curve.

The implementation of DVFS is overseen by the operating system (OS) to conserve energy or adhere to thermal constraints. OS "policies" govern the power consumption and performance of the system. Policies focused on energy conservation opt for lower clock frequencies, resulting in reduced performance. Conversely, policies prioritizing maximum performance leverage higher clock frequencies at the expense of increased energy consumption.

The application of full DVFS is constrained by circuit board parasitics and the relatively slow switching frequencies of discrete VRMs, limiting them to "coarse-grained DVFS" in tens of microseconds. Realizing the complete benefits of DVFS necessitates using fully integrated voltage regulators (FIVRs) or integrated voltage regulators (IVRs) capable of supporting voltage scaling in less than a microsecond. While AVS and DVS are hardware-driven, DVFS is a software-controlled process managed by the OS.

Dynamic voltage and frequency scaling can significantly improve the power efficiency of multi-core CPU environments.jpg

Dynamic voltage and frequency scaling can significantly improve the power efficiency of multi-core CPU environments

Importance in GPU functionality

Contemporary GPUs, exemplified by models like the Radeon RX 590 or the GeForce GTX 1080 Ti (depicted above), often exhibit substantial power and current requirements, necessitating the use of VRMs. These VRMs undergo significant heating during their operation, prompting the occasional need for heat sinks. The functionality of GPU VRMs mirrors that of CPU VRMs: power is transmitted from the PSU to the VRM, where it is regulated to stay within the GPU's maximum voltage limits before being delivered to the GPU.

It's important to highlight that VRMs need to be more adequately sized for their respective GPUs may face the risk of malfunction if the current they transmit to the GPU surpasses the GPU's capacity.

Types of VRMs

Single-phase VRMs

In most cases, a VRM circuit is commonly structured as a buck converter, although it's worth noting that this isn't the exclusive design approach. Illustrated below is a fundamental diagram of a VRM circuit. On the left side, the standard 12 V originates from the power supply unit. Notably, just before point A, there are two MOSFETs—analogous to actual switches—comprising a low and high sides. The choke, or a filtering inductor, is positioned to the left of point B.

The primary objective of the circuit is to transform the power supply voltage, initially at 12 V before point A, into the considerably lower operating voltage at point B, typically around 1.2 V, tailored to the requirements of the CPU or GPU.



When the high-side switch is engaged, causing the voltage at point A to rise to 12 V, the inductor's response prevents an instantaneous change in voltage at the other end. Instead, the inductor resists an abrupt shift in current. As the 12 V is applied to the inductor, it initiates the buildup of a magnetic field, resulting in a voltage drop at the output terminal. The magnetic field continues to grow as the inductor charges, leading to a diminishing voltage drop until it's fully charged and the voltage attains 12 V. The graph below illustrates the voltage that would reach the CPU/GPU at point B if the high-side switch were to remain closed for an adequate duration:



As depicted, the inductor's role in the circuit impedes the voltage from reaching 12 V instantaneously. The rate of voltage change depends on the inductance of the inductor. For instance, a smaller inductor with lower inductance facilitates a quicker voltage change due to its ability to build a smaller magnetic field.

Upon reopening the high-side switch, the voltage at point A reverts to 0 V. Despite the switch opening, the inductor retains a magnetic field established during the charging process. As the high-side switch opens, the inductor's magnetic field begins to collapse, generating current at point B, which is supplied to the CPU. This results in a sudden voltage spike at point B. To mitigate this flyback effect, a flyback diode is integrated into the circuit. Recognizing the inefficiency of diodes, the low-side switch is concurrently closed when the high-side switch is opened. This redirection of current through the switch, rather than the diode acting more like a wire, enhances the circuit's efficiency. The graph below portrays the voltage fed to the CPU/GPU at point B when the high-side switch is opened and the low-side switch is closed:



Voltage Regulation

The ultimate objective of the circuit is to sustain a consistent voltage, typically targeted at around 1.2 volts for a contemporary microprocessor. To achieve this 1.2 V output, the circuit must terminate the inductor charging process when the voltage at point B reaches the desired level. Subsequently, as the voltage declines, the circuit resumes the inductor charging cycle. This perpetual cycle is orchestrated through a technique known as pulse-width modulation (PWM), which ensures that the average voltage aligns with the specified operating voltage. At an approximately 50% duty cycle, the output voltage at point B stands at 6 V. To attain the intended 1.2 V, the duty cycle should be set to 10%. In practical circuits, the opening and closing of the low-side and high-side MOSFETs are managed by the PWM controller, coupled with a driver or a doubler.


Multiphase VRMs

A typical motherboard VRM often comprises three or more phases in a contemporary computer system. The operation of a multiphase VRM closely resembles that of the single-phase VRM explained earlier, but it employs multiple such circuits in parallel. Each phase manages a fraction of the total current required by the CPU or GPU. The key is that each phase is slightly offset, ensuring that only one phase has its high-side switch closed and charges its inductor at any given moment, while the rest are discharging.


By strategically overlapping the phases with an offset, we maintain the same 1.2 operational voltage. However, as one phase decreases in voltage, the next phase seamlessly takes over. This approach leads to a more stable average voltage sent to the CPU, thanks to the tighter voltage tolerance resulting from the smaller amplitude.


Overlaying the output voltage makes it evident that multiple phases enable much tighter tolerances and an overall improvement in power delivery:


It's crucial to note that, as the total current supplied to the CPU remains relatively constant (when comparing single-phase VRM to multiphase), this total current is now distributed among the multiple phases. For instance, in a dual-phase VRM, each phase handles roughly 50% of the current on average. Consequently, each phase deals with a portion of the total load, reducing the strain on individual components.

Moreover, due to high-side and low-side MOSFETs switching, some unwanted ripple occurs at the switching node (point A). The more phases there are, the less noticeable the ripple effect becomes, as there is a reduction in ripple wave amplitude and, consequently, current. Furthermore, with an increase in phases, the reduction in the ripple effect is more pronounced. For instance, transitioning from 2-phases to 4-phases results in a considerably more significant reduction in ripple current than from 6-phase to 8-phases.


VRMs operate under the control of a PWM Controller, typically available in configurations of 4, 6, or 8 phases. While some rare PWMs extend up to 10 phases, the majority in use are 4 and 6-phase PWMs, with 8 phases being more common. Motherboards achieve 12-, 16-, or 24-phase VRMs by employing doublers. A phase doubler augments the number of phases by generating two interleaved signals derived from the original.

The doubler reduces the switching frequency by half, given the interleaving of the two signals.


Although doublers tend to increase costs due to the requirement for double the integrated circuits on the motherboard, it offers advantages such as diminishing the load current on any given phase, resembling a "true" multiphase setup. However, it lacks the benefits associated with tighter voltage tolerance. This approach is widely adopted and can be found on numerous motherboards that claim to have 8 or 16 phases (constructed from 4 and 8 "real" phases, respectively).

Understanding VRM Operation

True vs. Virtual Phases in VRMs

The distinctions between True Phases and Virtual Phases have been introduced to clarify the origin of phases, distinguishing those directly derived from the PWM Controller versus alternative schemes such as those implemented by doublers.

For instance, certain motherboards may employ a dual 6+1 phase PWM Controller (e.g., Intersil ISL6367) but present it as an 8-phase or more configuration. This is accomplished by doubling 4 of the 6 phases, resulting in 8, while the remaining two remain unused, as illustrated in the diagram to the right. In this scenario, it can be noted that there are "8 virtual phases but only 4 true phases." Despite improved power delivery due to better current distribution, the interleaving effect remains relatively subpar compared to configurations with 6 or 8 true phases. Utilizing virtual phases may sometimes need to be clarified regarding the VRM quality of the motherboard.


X+Y+.. Phase VRM notations explained

In addition to the CPU cores, various other voltage rails require dedicated phases. Some of these distinct voltage rails include:

  • CPU Voltage (VCORE)

  • System Agent/IMC/VccSA

  • IGPU


  • DRAM

  • and more...

To denote the allocation of phases for each of these rails, certain motherboards employ the "X+Y" or "X+Y+Z" notation. The "+Y" and "+Z" indicate that these phases are designated for different rails, such as the integrated graphics. For instance, "6+2" signifies that six phases are designated for a specific rail (typically CPU cores), while the remaining two can be utilized for another purpose. Not all phases must be actively used; for example, a "6+2" configuration might allocate six phases to the CPU cores, one phase to another rail, and leave one phase unconnected. Additional independent PWM controllers may be introduced for managing other rails. It's essential to recognize that, in general, most PWMs cannot combine rails. In other words, a "6+2" configuration cannot function as an 8-phase VRM for driving the CPU power rail.

How to Design a VRM?

Detailed look at on-board components

In most cases, the components on a standard motherboard are interconnected in a fashion resembling this:


In the context of a standard motherboard, the interconnection of components typically follows a configuration akin to the one illustrated below using the ASUS P6X58D Premium as an example:


Identifying components such as capacitors and substantial chokes surrounding the processor is relatively straightforward. Notably, on this particular board, the MOSFETs, prone to heating in overclocked systems, are strategically positioned beneath the heat pipe fins for passive cooling. Upon removing the heat pipe, the remaining elements of the VRM are exposed:


The board image highlights the 16 phases constituted by 16 capacitors, 16 chokes, 32 MOSFETs, 16 diodes, and 16 resistors. A meticulous examination is necessary to ascertain the number of true phases present (given the absence of 16-phase PWMs, it's evident that some form of doubling is employed). In this specific board, Asus has integrated their Energy Processing Unit (EPU) alongside its driver/PWM chip, known as a 'PEM,' located on the back of the board as depicted on the right. Despite being marketed as having a "16+2 phase VRM design," the reality is different. In truth, this board features 8 true phases and 16 virtual phases. The EPU chip (ASP0800) and the PEM chip (ASP0801) work in tandem to deliver 4 synchronized phases each, amounting to 8 true phases.

These 8 phases are then doubled to create 16 virtual phases. Notably, the EPU on this board boasts additional functionalities, such as dynamically adjusting PWM duty cycles based on the load and providing software accessibility for manual adjustment of these frequencies.

The specific components on this board, in the order presented on the board, include:

  • FP5K 821 Aluminum Polymer Capacitor

  • Trio R51A Chokes

  • 5525L MOSFET

  • 9025L MOSFET

Less desirable implementations and their drawbacks

Some VRM implementations encountered in various systems may need to be more optimal. One relatively prevalent approach involves utilizing a single PWM signal to control two distinct circuits:


This setup is frequently employed due to its cost-effectiveness, utilizing only a single-phase PWM for clocking. Doubling the circuit increases power, cooler component temperatures, and improved efficiency. However, it needs to achieve enhanced voltage thresholds akin to true phases. Depending on the motherboard manufacturer, they may label it as two phases, although it functions as a single phase.

Feedback and Regulation Techniques

The CPU voltage rarely remains constant due to the implementation of various Dynamic Voltage and Frequency Scaling (DVFS) techniques. These techniques dynamically adjust the load under diverse conditions to enhance efficiency. This introduces a non-ideal scenario, requiring the VRM to compensate for factors like voltage droop through a feedback loop. The general process is outlined below.


It's important to note that, for this discussion, the specific implementation details of the VRM can be considered somewhat irrelevant, treating it as a black box. In the illustration above, the VRM comprises standard components such as MOSFETs, chokes, capacitors, etc. The power unit may be integrated into the PWM Controller, and on more advanced boards, it could feature sophisticated hardware and software functionalities. The unit employs a negative feedback loop to rectify voltage levels. The fundamental mechanism remains consistent – the reference voltage (derived from BIOS configuration like SVID/DVID) is input to the unit, which is then compared to the monitored voltage. The disparity between the reference voltage and the actual voltage sent to the CPU is utilized to adjust the PWM signal, aiming for a more accurate correction of the CPU's actual voltage signal. This sampling and correction process occurs continuously, with the ultimate objective of aligning the voltage delivered to the load as closely as possible with the reference voltage.


Irrespective of the PWM circuit type utilized, the reference voltage in a modern computer system is invariably digital. In the case of an analog circuit, a Digital-to-Analog Converter (DAC) is employed to convert the signal into an analog form. This analog signal is then compared with the real voltage feedback using an error amplifier, generating an error signal that indicates the deviation from the desired voltage. Simultaneously, the reference voltage is introduced into a ramp generator, creating a sawtooth wave. This sawtooth wave and the error signal are transmitted to the PWM generator, which generates the signal for the VRM to operate.


The current and temperature (often combined) in contemporary circuits are also sampled and utilized, along with the sawtooth wave and error signal, to produce the accurate PWM signal output.


As the voltage undergoes sampling, if it is lower than the reference, the PWM strives to rectify it by slightly shifting from the previous signal. This process persists until the voltage rises excessively. Subsequently, the voltage decreases by introducing slight shifts in each successive signal until it becomes too low. Consequently, the voltage continually compensates by oscillating between too low and too high.

This technique offers advantages, including its exclusive reliance on hardware, ensuring significantly faster reaction times and corrections. Additionally, it is cost-effective, more straightforward to implement correctly, and generally results in a more straightforward circuit design.

An instance of an analog PWM Controller is the Intersil ISL6366, characterized as a dual 6+1 configuration.



The already digital reference voltage is directly routed to a microcontroller in a digital-oriented circuit. Like the analog circuit, the various feedback values from monitoring are analog and thus undergo conversion to digital using an ADC. Unlike the analog counterpart, a microcontroller with a PID algorithm takes charge of all feedback lines, the reference voltage, and various BIOS settings. Typically, the microcontroller also features a small memory capacity for storing additional customizable settings, offering enhanced flexibility.


A digital-based circuit typically considers numerous variables from various sensors, BIOS settings, and stored values. The microcontroller, implementing the PID algorithm, processes these values to precisely determine the extent of adjustments without overshooting or undershooting, unlike the analog circuit.


The new signal is calculated based on previous modifications throughout the continuous sampling and correction, achieving tighter thresholds. The primary advantage of employing a digital circuit lies in the extensive freedom and control of customization. In addition to various protections (e.g., OVP, OCP, OTP, UVP, and SCP), advanced controllers can actively manage the activation and deactivation of phases to enhance system efficiency, along with other VRM phase-specific configurations (e.g., clocking the individual doublers).

However, digital circuits come with several drawbacks. Apart from being considerably more expensive, they demand effective implementation of complex code and algorithms. It's essential to note that digital solutions, while offering significant advantages, could be more flawless, mainly due to the slower-than-required sampling rate, necessitating the incorporation of some form of dithering.

How Does VRM Improve Performance?

The primary goal of a VRM is to deliver stable and dependable power. While a simple VRM can sufficiently support a mid-range CPU at a moderate speed, the importance of VRM quality becomes more pronounced when overclocking or pushing component boundaries.

VRMs in Modern Computing

GaN-based hybrid VRM for 48V to 1V direct conversion

A shift from conventional 12Vdc power distribution to 48Vdc is underway to meet the increasing power demands of data centers. While this transition promises a 16x reduction in distribution losses, it poses significant challenges in VRM design. The demanding conversion ratio from 48V to core voltages as low as 1V makes achieving the desired VRM efficiencies and power densities impossible.

Addressing this challenge, a variant of the Dickson switched-capacitor converter, known as a Dual Inductor Hybrid Converter (DIHC), has been developed for 48V-to-1V VRM power conversion. The DIHC innovatively eliminates two large synchronous switches and incorporates two interleaved inductors at the output. This design employs fewer switches with more effective switch utilization than the Dickson converter, resulting in significantly lower conduction losses and a more negligible equivalent output impedance. The DIHC boasts a peak efficiency exceeding 95% and maintains over 90% efficiency at a 20% loading. Impressively, it achieves a power density of 225W/in3.

GaN-based DIHC VRM schematic.png

GaN-based DIHC VRM schematic


Voltage Regulator Modules (VRMs) are intricate and specialized buck DC/DC converters designed to supply power to CPUs and GPUs. They exhibit diverse implementations, ranging from discrete components on the motherboard to standalone modules that plug into dedicated connectors. Additionally, some are seamlessly integrated directly into the CPU/GPU. Beyond mere power supply, a VRM plays a pivotal role in facilitating dynamic and optimal performance, offering the flexibility to fine-tune for maximum energy efficiency, peak computing performance, or a balanced intermediate level of both.

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  • What does a voltage regulator module do?
  • The VRM is a buck converter, delivering the necessary supply voltage to microprocessors and chipsets. It accomplishes this by converting +3.3 V, +5 V, or +12 V to lower voltages essential for the devices. This capability enables installing devices with varying supply voltages on a single motherboard.

  • How do high-voltage modules work?
  • Contemporary high-voltage power supplies utilize power conversion configurations rooted in SMPS technology. This allows for the transformation of low-frequency, low-voltage input into higher voltages at the output.

  • How do I know if my voltage regulator is bad?
  • Issues with the battery, illuminated warning indicators, problems with lighting, and other peculiar electrical behaviors are the primary indicators of a faulty voltage regulator.

  • How do I know if my VRM is overheating?
  • One clear indication of VRM failure or deterioration is experiencing sudden and unexpected shutdowns on your computer, particularly when subjected to intense loads or overclocking.

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