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Home > Technology List > Dual-channel,simultaneous sampling SAR converters-AD7380 and AD7381

Dual-channel,simultaneous sampling SAR converters-AD7380 and AD7381

Published time: 2019-12-20 16:51:33

Dual-channel,simultaneous sampling SAR converters-AD7380 and AD7381

ADI recently released two new products, the AD7380 and AD7381. This article will give you a brief introduction to some of their features and applications. Before we get into that, let's get started.

1.The introduction of AD7380/AD7381

The AD7380 / AD7381 is a two-channel synchronous sampling successive Approximation Register (SAR) converter .
The AD7380 and AD7381 are 16-bit and 14-bit converters, respectively, with a maximum throughput rate of 4msps. These devices have fully differential analog inputs and can accept a wide common-mode Range The external reference voltage of AD7380 and AD7381 is 3.3 v, which can achieve the typical signal-to-noise ratio (SNR) of 92.5 DB and 85.4 DB respectively.

2.The features of AD7380/AD7381

1.3 mm x 3 mm LFCSP package

2.High throughput rate: 4 MSPS @ 16-bit, 5 MSPS @ 14-bit

3.Dual simultaneous sampling and conversion with two complete ADC functions

4.Small sampling capacitor reduces amplifier drive burden

5.Integrated oversampling clock to increase dynamic range, reduce noise and reduce SCLK speed requirements

6.Differential analog inputs with wide common mode range

3.The application of AD7380/AD7381
1.Motor control

2.Data acquisition systems


4.I and Q demodulation

More information check the AD7380/AD7381 datasheet


The AD7380 / AD7381 uses well-known oversampling methods to improve performance. In this technique, multiple samples are captured and averaged to reduce quantization noise and thermal noise. The on-chip oversampling provides faster processing time for the AD7380 / AD7381 than for the design of oversampling using external devices such as microcontrollers.

The AD7380 / AD7381 oversampling has two modes of operation, which are discussed below.

Normal Averaging oversampling

When this mode of operation is activated, the ADC takes a given number of samples, adds them, and divides the result by the number of samples. The final mean value is output from the ADC. To produce another output sample, the ADC takes a new set of samples and processes them (the previous sample set is discarded) . Figure 2 below shows the normal average oversampling operation pattern.

As you can see, the falling edge of CS starts the sampling process. For each CS falling edge, take n samples and average them. The results are ready to be read back on the next serial interface access. As shown in figure 3 below (see the "oversampling rate" column) , AD7380 / AD7381 can sample an average of up to 32 samples.

As expected, increasing the oversampling rate increases the signal-to-noise ratio; however, it decreases the output data rate. This is why the normal average oversampling method is suitable for applications that require high SNR but do not consider bandwidth. The parameter "RES" shown in table is a configuration bit that can be set to a logical high level when oversampling is used. When "RES" 1, the number of bits used to represent the ADC output increases by 2, so that the output data can be adapted to the higher performance achieved by oversampling operation mode.

Note that with normal mean oversampling, we can start the sampling process by applying the falling edge of CS, but we can not control the other sampling times. The sampling time of these additional samples is actually determined internally by the device. This can be a disadvantage in some applications.

It is worth noting that ADC automatically adjusts the clock frequency of the SPI interface based on oversampling rate (OSR) , since the data rate to be transmitted depends on Osr.

Rolling Average oversampling

The operation mode takes a given number of samples, ADDS them together, and divides the result by the sample number to produce the ADC output sample. The normal mean oversampling discards the sample set after calculating the mean; for the rolling mean oversampling, the sample set is not cleared after the procedure. Instead, the rolling method uses a FIFO buffer to hold the most recent previous sample of a given number and compute the average.

In this article, we looked at some of the important features of the AD7380/AD7381 data converters. These dual-channel simultaneous sampling ADCs incorporate on-chip oversampling blocks to offer a higher SNR. They have internal 2.5 V reference blocks and support two-wire and one-wire SPI communication. 



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