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Home > Technology List > The difference between TTL level and CMOS level

The difference between TTL level and CMOS level

Published time: 2018-08-08

What is a TTL circuit?

The full name of TTL integrated circuits is Transistor-Transistor Logic, which mainly has 54/74 series standard TTL, high speed TTL (H-TTL), low power TTL (L-TTL), Schottky TTL (S-TTL) and low power Schottky TTL (LS-TTL). 

Standard TTL input high level minimum 2V, output high level minimum 2.4V, typical value 3.4V; input low level maximum 0.8V, output low level maximum 0.4V, typical value 0.2V. S-TTL input high level minimum 2V, output high level minimum class I 2.5V, II, III class 2.7V, typical value 3.4V; input low level maximum 0.8V, output low level maximum 0.5V. LS-TTL input high level minimum 2V, output high level minimum class I 2.5V, II, III class 2.7V, typical value 3.4V, input low level maximum class I 0.7V, class II, III class 0.8V, output Low level maximum class I 0.4V, class II, class III 0.5V, typical value 0.25V. 

TTL circuit power supply VDD supply range is +5V ± 10%, and the number of fanouts is less than 10 TTL gate circuits. TTL level signals are widely used because of the binary representation of data representation, +5V is equivalent to logic "1", 0V is equivalent to logic "0", and this is called TTL signal system. It is the standard technique for communication between various parts of a device controlled by a computer processor. In the point of Jotrin Electronics, TTL level signals are ideal for data transmission inside computer-controlled devices. 

First, the data transmission inside the device that controlled by the computer processor is not high on the power supply and the heat loss is low. 

The level signal is directly connected to the integrated circuit without the need for expensive line drivers and receiver circuits; in addition, the data transmission inside the device controlled by the computer processor is performed at a high speed, and the operation of the TTL interface can meet this requirement.

TTL circuit diagram


What is the CMOS circuit?

The full name of COMS integrated circuit is called the abbreviation of complementary symmetrical metal oxide semiconductor integrated circuit. Many basic logic units of the circuit are connected in a complementary symmetrical form by an enhanced PMOS transistor and an enhanced NMOS transistor.The static power consumption is small. 

The COMS circuit has a wide supply voltage range and it can work normally between +5--+15V, and the voltage fluctuation is allowed to ±10. When the output voltage is higher than VDD-0.5V, it is logic 1 and the output voltage is lower than VSS+0.5V ( VSS is digital ground),it is logic 0, and the number of fanouts is 10--20 COMS gates.

 CMOS circuit

CMOS level and TTL level: CMOS level voltage range is 3 ~ 15V, such as 4000 series, when 5V power supply, the output is high above 4.6, the output is low below 0.05V. The input is at a high level above 3.5V, and the input is at a low level below 1.5V. 

For TTL chips, the power supply range is 0~5V, which is usually 5V. For example, 74 series 5V power supply, the output is high above 2.7V, the output is low below 0.5V, and the input is higher than 2V. Flat, low below 0.8V. Therefore, It should be noted that there is a problem of level conversion when the CMOS circuit is used together with the TTL circuit, so that two The level field values can be matched.

Jotrin Electronics limited summarizes the difference between TTL circuit and CMOS circuit for you,reflected six aspects in the follow:

Firstly we need to know the Important parameters of TTL circuits and CMOS circuits:
Input High level (Vih): The minimum input high level allowed when the logic gate input is high. When the input level is higher than Vih, the input level is considered high.
Input Low level (Vil): The maximum input low allowed when the logic gate input is low. When the input level is lower than Vil, the input level is considered low.
Output high level (Voh): The minimum value of the output level when the output of the logic gate is high. The level value of the logic gate output must be greater than this Voh.
Output Low level (Vol): The maximum value of the output level when the output of the logic gate is low, and the level of the logic gate when the output of the logic gate is low must be less than this Vol.
Ioh: Load current (which is the pull current) when the logic gate output is high. (pull and fill are considered from the perspective of the peripheral circuit)
Iol: Load current when the logic gate output is low (sink current).
Iih: Current when the logic gate input is high (sink current).
Iil: Current when the logic gate input is low (current is drawn).
1,The difference between TTL level and CMOS level:
The TTL circuit power supply voltage Vcc is 5V, and the CMOS circuit power supply voltage Vcc is generally 12V.
The TTL level standard is:
Output L: <0.8V; H:>2.4V.
Input L: <1.2V; H:>2.0V
The CMOS level is:
Output L: <0.1*Vcc ; H:>0.9*Vcc.
Enter L: <0.3*Vcc ; H:>0.7*Vcc.

The input that is not used by the TTL circuit is suspended high; however, the input that is not used by the CMOS circuit cannot be left floating, otherwise it will cause logic confusion. In addition, the CMOS integrated circuit power supply voltage can be varied within a wide range, so the power supply requirements are not as strict as TTL integrated circuits, so the 5V level cannot trigger the CMOS circuit, and the 12V level can damage the TTL circuit, so they cannot compatible match.

2.The comparison of TTL and COMS circuits:

1) The TTL circuit is a current control device, and the coms circuit is a voltage control device.
2) The TTL circuit has a fast speed and a short transmission delay time (5-10 ns), but the power consumption is large. The COMS circuit is slow,it has a long transmission delay (25-50 ns) but low power consumption. The power consumption of the COMS circuit itself is related to the pulse frequency of the input signal. The higher the frequency, the higher the chip set temperature.
3) The locking effect of the COMS circuit:
Due to the input of current is too large in the COMS circuit, the internal current increases sharply, and the current continues to increase unless the power supply is turned off. That is the locking effect. When the locking effect occurs, the internal current of the COMS can reach 40 mA or more, and it is easy to burn the chip.

What should we do ,i will tell you about the defensive measures:

1) Add a clamp circuit at the input and output terminals so that the input and output do not exceed the specified voltage.
2) Add a decoupling circuit to the power input terminal of the chip to prevent instantaneous high voltage on the VDD terminal.
3) Add a current-limiting resistor between VDD and the external power supply, and let it go in even if there is a large current.
4) When the system is powered by several power sources separately, the switch should be in the following order: when it is turned on, first turn on the power of the COMS circuit, then turn on the power of the input signal and the load; when it is off, first turn off the power of the input signal and the load, then Turn off the power to the COMS circuit.

What should we pay attention to when using COMS circuits ?

1) The COMS circuit is a voltage control device, which has a large input impedance and a strong ability to capture interference signals. Therefore, do not use the unused pins. Connecting a pull-up resistor or a pull-down resistor to give it a constant level.
2) When inputting a signal source with low internal resistance, connecting a current limiting resistor between the input terminal and the signal source to limit the input current to 1mA.
3) When the long signal transmission line is connected, the matching resistor is connected at the COMS circuit.
4) When the input terminal is connected to a large capacitor, the resistor should be indirectly protected at the input and capacitor. The resistance value is R=V0/1mA. V0 is the voltage on the external capacitor.
5) If the input current of COMS exceeds 1 mA, it is possible to burn out COMS.

The input load characteristics of the TTL gate circuit (What should we do when a special situation occurs with the input with resistance):

1) When floating, it is equivalent to the input terminal connected to the high level. Because this can be seen as an input that terminates an infinite resistor.
2) After inputting a 10K resistance in series with the input of the gate circuit, input a low level, and the input terminal presents a high level. Because the input load characteristic of the TTL gate circuit shows that the low-level signal input from the input terminal can be recognized by the gate circuit only when the series resistance of the input terminal is less than 910 ohms, and the input terminal is always presented when the series resistance is large. High level. The COMS gate does not need to consider these.
5, What is the open-drain output of TTL circuit and CMOS circuit
The TTL circuit has an open collector OC gate, and the MOS transistor also has an open-drain OD gate corresponding to the collector, and its output is called an open-drain output. The OC gate has a leakage current output at the cutoff stage. That is because that when the three tubes are turned off, their base current is approximately equal to zero, and the current through the collector of the triode is also approximately equal to zero. This current is called leakage current. The open-drain output can sink a large amount of current, but cannot output current outward. Therefore, in order to input and output current, it should be used together with the power supply and the pull-up resistor. The OD gate is generally used as an output buffer/driver, level shifter, and to meet the need to sink large load currents.
6. What is called a totem pole, the difference between a totem pole and an open circuit?
In TTL integrated circuits, the output with the pull-up transistor is called the totem pole output, and the other is called the OC gate. Because TTL is a three-level switch, the totem pole is also connected by two three-stage push-pull. So push-pull is a totem.
 

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