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Home » Technology List » How To Test Operational Amplifiers

# How To Test Operational Amplifiers

Published time: 2018-08-27

### The purpose of testing the operational amplifier

1. Understanding the test principle and the method of testing the operational amplifier- LM324
2. To help people better make their test reports about operational amplifier

### What is the test principle of the operational amplifier

An integrated operational amplifier is a linear integrated circuit，which like other semiconductor devices, using some performance indicators to measure its quality. In order to properly use the integrated op amp（The abbreviation for an integrated operational amplifier）You must understand its main parameters. The indicators of the integrated op amp are usually tested by dedicated instruments, and Jotrin Electronics limited will tell you a simple test method here.To test the operational amplifier ,we will take LM324 as an example to test operational amplifiers.

The pinouts are shown in Figure 1. It is a sixteen-pin dual in-line component with four independent op amp a common power supply, the four pinouts is the positive power supply, and 11 for the negative power supply.

Figure 1 LM324 pin diagram                Figure 2 Uos, The test circuit diagram of offset voltage

### The steps for testing the operational amplifier are as follows：

1. Inputting offset voltage Uos

An ideal op amp component that outputs zero when the input signal is zero. But even the best quality integrated components, due to the internal differential input of the op amp and the incomplete symmetry of the parameters, the output voltage is often not zero. This phenomenon of zero output at zero input is called the offset of the integrated op amp.

Inputting offset voltage Uos - refers to the value of the voltage appearing at the output to the input of the same direction when the input signal is zero.The test circuit diagram of offset voltage is shown in Figure 2.

Closing the switches K1 and K2 to short the resistor RB. When measuring the output voltage U01 at this time, it is the output offset voltage, then calculating the input offset voltage:

The voltage that actual be measured U1 may be positive or negative, and the high-quality op amp Uos is generally below 1mV.

Jotrin Electronics limited said that we should pay attention to when we test：

①Open the zero terminal of the op amp.

②The parameters of the resistors R1 and R2, R3 and RF are required to be strictly symmetrical.

2. Inputting offset current, Ios

The offset current Ios is the difference between the base bias currents of the two inputs of the op amp when the input signal is zero:

The magnitude of the input offset current reflects the mismatch of the two transistors β in the internal differential input stage of the op amp.

Since the values of IB1 and IB2 are small (microampere level), their difference is usually not directly measured. The test circuit is shown in Figure 2. The test is performed in two steps:

① Close the switches K1 and K2 and measure the output voltage U01 at low input resistance. As mentioned above, this is the output voltage caused by the input offset voltage Uos.

②Disconnect the two input resistors RB injected from K1 and K2. Because the RB resistance is large, the difference between the input current flowing through them will become the difference of the input voltage. Therefore, the input voltage will also be affected. The output voltage U02 when two resistors RB are connected can be measured. If the influence of the input offset voltage Uos is subtracted from it, the input offset current Ios is:

We should pay attention to

① Open the zero terminal of the op amp.

②The two input resistors must be precisely matched.

3. Open-loop differential mode amplification Aud

Figure 3 Aud test circuit diagram

The DC differential mode amplification factor without external feedback is called open-loop differential mode amplification, which is denoted by Aud. It is defined as the ratio of the open-loop output voltage Uo to the applied signal voltage Uid between the two differential inputs:

According to the definition, Aud should be the DC amplification factor when the signal frequency is zero. However, for the convenience of testing, the sinusoidal AC signal with low frequency (below tens of Hz) is usually used for measurement. Since the open-loop voltage of the integrated op amp is high, it is difficult to measure directly, so the closed-loop measurement method is generally used. Aud has many measurements, now the AC-DC simultaneous closed-loop test method is used, as shown in Figure 3.

On the one hand, the measured operational amplifier completes the DC closed loop through R1 and R2, RF to suppress the output. Voltage drift, on the other hand, through Rs, Rf to achieve AC closed loop, the external signal Us is divided by R1 and R2, so that Uid is small enough to ensure that the op amp works in the linear region, the non-inverting input resistor R3 should be the inverting input resistor R2 matching to reduce the effect of the input bias current, capacitor C is a DC blocking capacitor. The open-loop voltage amplification factor of the tested op amp is:

Tips that during the test

① The circuit should be first damped and zeroed before testing.

② The measured op amp should work in the linear region

③ The input signal frequency should be low, generally 50~100Hz, the output signal amplitude should be small, and there is no obvious distortion.

4. Common mode rejection ratio CMRR

The ratio of the differential mode amplification Ad of the integrated operational amplifier to the common mode voltage amplification factor Ac is called the common mode rejection ratio:

The common mode rejection ratio is an important parameter in the application. The output of the common mode amplifier of the ideal op amp should be zero, but in the actual integrated op amp, the output is unlikely to have no common mode signal component. The smaller the mode signal, the better the symmetry of the circuit, that is the stronger the ability of the op amp to suppress the common mode interference signal, that is the larger the CMRR. The test circuit diagram of CMRR is shown in Figure 4:

Figure 4 The test circuit diagram of CMRR

The differential mode voltage amplification of the integrated op amp operating in the closed loop state is:

When the Uic is fed into a common mode input signal, the Uoc is measured, the common mode voltage magnification is:

Get the common mode rejection ratio:

Attention should be paid during the test

② The resistance between R1 and R2, R3 and RF is strictly symmetrical.

③ The input signal Uic amplitude must be less than the maximum common-mode input voltage range of the integrated op amp.

5. Common mode input voltage range Uicm

The maximum common-mode voltage that an integrated op amp can withstand is called the common-mode input voltage range. Outside this range, the op amp's common-mode rejection ratio is greatly reduced, the output waveform is distorted, and some op amps are “self-locking” and permanent damage.

Figure 5: The test circuit diagram of Uicm.

The measured operational amplifier is connected in the form of a voltage follower, and the output terminal is connected to the oscilloscope to observe the maximum undistorted output waveform, then to determ the Uicm value.

6. Maximum dynamic range of output voltage

The dynamic range of the integrated op amp is related to the supply voltage, external load, and signal source frequency. The test circuit diagram is shown in Figure 6.

Changing the Us amplitude and observe the Uo shaving distortion start time to determine the Uo's undistorted range. This is the voltage peak-to-peak value Uopp that is output at a certain supply voltage.

Figure 5 Uicm test circuit             Figure 6 Uopp test circuit

Jotrin Electronics remind you that the following issues should be considered when using the integrated carrier:

1. The input signal can be either AC or DC. However, when selecting the frequency and amplitude of the signal, the frequency response characteristics of the op amp and the output amplitude limit should be considered.

2. Zero adjustment. In order to improve the accuracy of the operation, the DC output potential should be zeroed before the operation, that is to say, when the input is zero, the output is also zero. When the op amp has an external zero terminal, the component can be connected to the zero potentiometer Rw. When the zero is adjusted, the input terminal is grounded, the zero terminal is connected to the potentiometer Rw, and the output voltage Uo is measured with a multimeter. Rw, making Uo zero (the offset voltage is zero). If the op amp does not have a zero terminal, it can be zeroed according to the circuit shown in Figure 7.

Figure 7 zeroing circuit

### Jotrin Electronics limited summarize that if an op amp cannot be zeroed, there are roughly the following reasons:

① The components are normal and the wiring is wrong.
② The parts are normal, but the negative feedback is not strong enough (RF / R1 is too large). For this reason, the RF can be short-circuited to see if it can be zeroed.
③ The component is normal, but because of the high common-mode input voltage allowed, it may appear self-locking and therefore cannot be zeroed. To do this, turn off the power and then turn it back on. This is the case if it returns to normal.
④ The components are normal, but the circuit has self-excitation and should be vibration-damped.

⑤ The internal components of the components are damaged and the integrated blocks should be replaced.

3. Vibration reduction. When an integrated op amp is self-excited, it will show that there will be an output even if the input signal is zero, which will make various computing functions impossible, and will damage the device in severe cases. In the test, the oscilloscope can be used to monitor the output waveform. In order to eliminate the self-excitation of the op amp, the following measures are often taken:

① If the op amp has a phase compensation terminal, an external RC compensation circuit can be used. The specifications include compensation circuit and component parameters.
② Circuit wiring and component layout should minimize distributed capacitance.
③ Connectting tens of uF electrolytic capacitors and 0.01~0.1uF ceramic capacitors in parallel between the positive and negative power supply lines and ground to reduce the influence of the power supply leads.

### What test equipment and devices are we going to use during the test

Function signal generator, multimeter, dual trace oscilloscope

The Integrated operational amplifier_LM324, Resistors, Capacitors.

#### The Summary of testing operational amplifiers

Jotrin Electronics limited reminds to everyone that we should check the arrangement of the handle pins and the polarity and value of the power supply voltage firstly. Do not reverse the positive and negative power supplies.

1. Measuring input offset voltage Uos

Connect the test circuit according to Figure 2, close the switches K1 and K2, measure the output voltage U01 by a multimeter, and calculate Uos.

2. Measuring input offset current Ios

The test circuit is as shown in Figure 2. The switches K1 and K2 are turned on, the U02 is measured by a multimeter, and Ios is calculated.
3. Measuring open-loop differential mode voltage amplification Aud.

Connect the test circuit according to Figure 3. The input frequency of the op amp input is f=1000HZ, and the sinusoidal signal is about 30~50mV.

Monitor the output waveform with an oscilloscope, measure Uo and Ui, and calculate Aud.

4. Measuring common mode rejection ratio CMRR

Connect the test circuit according to Figure 4. The input voltage of the op amp input is f=1000HZ, Uic=1~2V sinusoidal signal, and the output waveform is monitored. Measure Uoc and Uic and calculate Ac and CMRR.

The test and calculation results are compared with the corresponding ranges on the LM324 datasheet and PDF to determine whether the tested product is acceptable.

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