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Virtex-6 HXT FPGA 720 I/O 1924FCBGA
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XC6VHX380T-2FFG1923C Product Details
Virtex®-6 FPGAs are the programmable silicon foundation for Targeted Design Platforms that deliver integrated software and hardware components to enable designers to focus on innovation as soon as their development cycle begins. Using the third-generation ASMBL™ (Advanced Silicon Modular Block) column-based architecture, the Virtex-6 family contains multiple distinct sub-families. This overview covers the devices in the LXT, SXT, and HXT sub-families. Each sub-family contains a different ratio of features to most efficiently address the needs of a wide variety of advanced logic designs. In addition to the high-performance logic fabric, Virtex-6 FPGAs contain many builtin system-level blocks. These features allow logic designers to build the highest levels of performance and functionality into their FPGAbased systems. Built on a 40 nm state-of-the-art copper process technology, Virtex-6 FPGAs are a programmable alternative to custom ASIC technology. Virtex-6 FPGAs offer the best solution for addressing the needs of high-performance logic designers, high-performance DSP designers, and high-performance embedded systems designers with unprecedented logic, DSP, connectivity, and soft microprocessor capabilities.
- Virtex-6 LXT FPGAs: High-performance logic with advanced serial connectivity
- Virtex-6 SXT FPGAs: Highest signal processing capability with advanced serial connectivity
- Virtex-6 HXT FPGAs: Highest bandwidth serial connectivity
Compatibility across sub-families
- LXT and SXT devices are footprint compatible in the same package
Advanced, high-performance FPGA Logic
- Real 6-input look-up table (LUT) technology
- Dual LUT5 (5-input LUT) option
- LUT/dual flip-flop pair for applications requiring rich register mix
- Improved routing efficiency
- 64-bit (or two 32-bit) distributed LUT RAM option per 6-input LUT
- SRL32/dual SRL16 with registered outputs option
Powerful mixed-mode clock managers (MMCM)
- MMCM blocks provide zero-delay buffering, frequency synthesis, clock-phase shifting, inputjitter filtering, and phase-matched clock division
36-Kb block RAM/FIFOs
- Dual-port RAM blocks
- Dual-port widths up to 36 bits
- Simple dual-port widths up to 72 bits
- Enhanced programmable FIFO logic
- Built-in optional error-correction circuitry
- Optionally use each block as two independent 18 Kb blocks
High-performance parallel SelectIO™ technology
- 1.2 to 2.5V I/O operation
- Source-synchronous interfacing using ChipSync™ technology
- Digitally controlled impedance (DCI) active termination
- Flexible fine-grained I/O banking
- High-speed memory interface support with integrated write-leveling capability
Advanced DSP48E1 slices
- 25 x 18, two`s complement multiplier/accumulator
- Optional pipelining
- New optional pre-adder to assist filtering applications
- Optional bitwise logic functionality
- Dedicated cascade connections
Flexible configuration options
- SPI and Parallel Flash interface
- Multi-bitstream support with dedicated fallback reconfiguration logic
- Automatic bus width detection
System Monitor capability on all devices
- On-chip/off-chip thermal and supply voltage monitoring
- JTAG access to all monitored quantities
Integrated interface blocks for PCI Express® designs
- Compliant to the PCI Express Base Specification 2.0
- Gen1 (2.5 Gb/s) and Gen2 (5 Gb/s) support with GTX transceivers
- Endpoint and Root Port capable
- X1, x2, x4, or x8 lane support per block
GTX transceivers: up to 6.6 Gb/s
- Data rates below 480 Mb/s supported by oversampling in FPGA logic.
- GTH transceivers: 2.488 Gb/s to beyond 11 Gb/s
Integrated 10/100/1000 Mb/s Ethernet MAC block
- Supports 1000BASE-X PCS/PMA and SGMII using GTX transceivers
- Supports MII, GMII, and RGMII using SelectIO technology resources
- 2500Mb/s support available
- 40 nm copper CMOS process technology
- 1.0V core voltage (-1, -2, -3 speed grades only)
- Lower-power 0.9V core voltage option (-1L speed grade only)
- High signal-integrity flip-chip packaging available in standard or Pb-free package options
- Number of LABs/CLBs
- Number of Logic Elements/Cells
- Total RAM Bits
- Number of I/O
- Voltage Supply
- 0.95V ~ 1.05V
- Mounting Type
- Surface Mount
- Operating Temperature
- 0??C ~ 85??C (TJ)
- Package / Case
- 1924-BBGA, FCBGA
- Supplier Device Package
- 1924-FCBGA (45x45)
XC6VHX380T Technical Support PDF Datasheet Overview
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Estimated Delivery Time: Feb 04 - Feb 09 days (choose Expedited at checkout).
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1.We provide 90 days warranty.
2.If some of the items you received aren't of perfect quality, we would resiponsibly arrange your refund or replacement. But the items must remain their orginal condition.
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- Q: What is the process for returns or replacement of XC6VHX380T-2FFG1923C?
All goods will implement Pre-Shipment Inspection (PSI), selected at random from all batches of your order to do a systematic inspection before arranging the shipment.
If there is something wrong with the XC6VHX380T2FFG1923C we delivered, we will accept the replacement or return of the XC6VHX380T-2FFG1923C only when all of the below conditions are fulfilled:
(1)Such as a deficiency in quantity, delivery of wrong items, and apparent external defects (breakage and rust, etc.), and we acknowledge such problems.
(2)We are informed of the defect described above within 90 days after the delivery of XC6VHX380T-2FFG1923C.
(3)The XC6VHX380T-2FFG1923C is unused and only in the original unpacked packaging.
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More details about return electronic components please see our Return & Change Policy.
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AMD Xilinx, Inc
- 1.About the Spartan-7 of Xilinx FPGA Family
- 2.Xilinx FPGA naming conventions
- 3.Xilinx-FPGA DNA reading method
- 4.Xilinx-7Series-FPGA high-speed transceiver use learning
- 5.FPGAs, 3D ICs, and MPSoCs suit LTE Advanced applications
- 6.Development Environment supports SoCs and MPSoCs.
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