XC4013-4PQ240C Product Details
The Xc4010D and XC4013D are RAM-less, lower-cost versions of the XC4010 and XC4013. They are identical to the XC4010 and XC4013-4PQ240C in all respects, except for the missing on-chip RAM.
The XC4010D and XC4013D are available in most of the same PLCC, PQFP, and PGA packages as their corresponding XC4000 non-D equivalents. See page 2-70 for details.
The XC4010D and XC4013D are also pin-compatible with the XC5210 (see XC5200 Data Sheet for additional information). The XC5210 provides another possible cost-reduction path for lower-performance applications that do not use the XC4000D features like wide-decoders and carry logic.
– Abundant flip-flops
– Flexible function generators
– No on-chip RAM
– Dedicated high-speed carry-propagation circuit
– Wide edge decoders (four per edge)
– Hierarchy of interconnect lines
– Internal 3-state bus capability
– Eight global low-skew clock or signal distribution network
• Flexible Array Architecture
– Programmable logic blocks and I/O blocks
– Programmable interconnects and wide decoders
• Sub-micron CMOS Process
– High-speed logic and Interconnect
– Low power consumption
• Systems-Oriented Features
– IEEE 1149.1-compatible boundary-scan logic support
– Programmable output slew rate (2 modes)
– Programmable input pull-up or pull-down resistors
– 12-mA sink current per output
– 24-mA sink current per output pair
• Configured by Loading Binary File
– Unlimited reprogrammability
– Six programming modes
• XACT Development System runs on ’386/’486-type PC, Apollo, Sun-4, and Hewlett-Packard 700 series
– Interfaces to popular design environments like Viewlogic, Mentor Graphics and OrCAD
– Fully automatic partitioning, placement and routing
– Interactive design editor for design optimization
– 288 macros, 34 hard macros, RAM/ROM compiler
- Approximate Gate Count
- CLB Matrix
- 24 x 24
- Number of CLBs
- Number of Flip Flops
- Max Decode Inputs (per side)
- Max RAM Bits
- Number of IOBs
XC4013D, XC4013D Logic Cell Array Datasheet
XC4013-4PQ240C Related Products
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Estimated Delivery Time: Jul 08 - Jul 13 days (choose Expedited at checkout).
Shipping & Payment
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- Lead Time
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- 2-5 days
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- $20.00-$45.00 (0.50 KG)
- 2-5 days
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- 2-5 days
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- 5-14 days
- REGISTERED AIR MAIL
- $2.00-$3.00 (0.10 KG)
- 7-30 days
Processing Time：Shipping fee depend on different zone and country.
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- Hand Fee
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- charge US$30.00 banking fee.
- charge 4.0% service fee.
- Credit Card
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90 days quality guarantee for all products.
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All the products will packing in anti-staticbag. Ship with ESD antistatic protection.
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After all the goods are ensure no problems afterpacking, we will packing safely and send by global express. It exhibitsexcellent puncture and tear resistance along with good seal integrity.
1.We provide 90 days warranty.
2.If some of the items you received aren't of perfect quality, we would resiponsibly arrange your refund or replacement. But the items must remain their orginal condition.
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- Q: What is the process for returns or replacement of XC4013-4PQ240C?
All goods will implement Pre-Shipment Inspection (PSI), selected at random from all batches of your order to do a systematic inspection before arranging the shipment.
If there is something wrong with the XC40134PQ240C we delivered, we will accept the replacement or return of the XC4013-4PQ240C only when all of the below conditions are fulfilled:
(1)Such as a deficiency in quantity, delivery of wrong items, and apparent external defects (breakage and rust, etc.), and we acknowledge such problems.
(2)We are informed of the defect described above within 90 days after the delivery of XC4013-4PQ240C.
(3)The XC4013-4PQ240C is unused and only in the original unpacked packaging.
Two processes to return the products:
(1)Inform us within 90 days
(2)Obtain Requesting Return Authorizations
More details about return electronic components please see our Return & Change Policy.
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- 4.Xilinx-7Series-FPGA high-speed transceiver use learning
- 5.FPGAs, 3D ICs, and MPSoCs suit LTE Advanced applications
- 6.Development Environment supports SoCs and MPSoCs.
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