Field Programmable Gate Arrays (XC3000A/L, XC3100A/L)
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XC3142A-2PQ100I Product Details
XC3000-Series Field Programmable Gate Arrays (FPGAs) provide a group of high-performance, high-density, digital integrated circuits. Their regular, extendable, flexible, user-programmable array architecture is composed of a configuration program store plus three types of configurable elements: a perimeter of I/O Blocks (IOBs), a core array of Configurable Logic Bocks (CLBs) and resources for interconnection. The development system provides schematic capture and auto place-and-route for design entry. Logic and timing simulation, and in-circuit emulation are available as design verification alternatives. The design editor is used for interactive design optimization, and to compile the data pattern that represents the configuration program.
The FPGA user logic functions and interconnections are determined by the configuration program data stored in internal static memory cells. The program can be loaded in any of several modes to accommodate various system requirements. The program data resides externally in an EEPROM, EPROM or ROM on the application circuit board, or on a floppy disk or hard disk. On-chip initialization logic provides for optional automatic loading of program data at power-up. The companion XC17XX Serial Configuration PROMs provide a very simple serial configuration program storage in a one-time programmable package.
- 50-85 MHz system clock rates
- 190 to 370 MHz guaranteed flip-flop toggle rates
- 1.55 to 4.1 ns logic delays
• High-end additional family member in the 22 X 22 CLB array-size XC3195A device
• 8 mA output sink current and 8 mA source current
• Maximum power-down and quiescent current is 5 mA
• 100% architecture and pin-out compatible with other XC3000 families
• Software and bitstream compatible with the XC3000, XC3000A, and XC3000L families
XC3100A combines the features of the XC3000A and XC3100 families:
• Additional interconnect resources for TBUFs and CE inputs
• Error checking of the configuration bitstream
• Soft startup holds all outputs slew-rate limited during initial power-up
• More advanced CMOS process
|Manufacturer||XILINX||RoHs Status||Lead free / RoHS Compliant|
|Packing||Tape & Reel (TR)/Cut Tape (CT)/Tray/Tube||Package/Case||QFP100|
XC3142A User Guide PDF Datasheet
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Product works as described
Estimated Delivery Time: Nov 29 - Dec 04 days (choose Expedited at checkout).
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