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TPL7407LADR

Gate Drivers 30-V, 7-Channel NMOS Array Low-Side Driver 16-SOIC -40 to 125

  • Manufacturer :
  • TI
  • Package/Case :
  • SOIC-16
  • Product Categories :
  • Power Management ICs
  • RoHs Status:
  • Lead free / RoHS Compliant
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TPL7407LADR Product Details

Texas Instruments TPL7407LA/TPL7407LA-Q1 NMOS Array Low-Side Driver is a high-voltage, high-current NMOS transistor array. This device consists of seven NMOS transistors that feature high-voltage outputs with common-cathode clamp diodes for switching inductive loads. The maximum drain-current rating of a single NMOS channel is 600mA. New regulation and drive circuitry added to give maximum drive strength across all GPIO ranges (1.8V–5V).  The transistors can be paralleled for higher current capability. The TPL7407LA/TPL7407LA-Q1’s key benefit is its improved power efficiency and lower leakage than a Bipolar Darlington Implementation. With the lower VOL, the user is dissipating less than half the power than traditional relay drivers with currents less than 250mA per channel. The TPL7407LA-Q1 devices are AEC-Q100 qualified for automotive applications.

TPL7407LADR

Feature

  • 600-mA Rated Drain Current (Per Channel)
  • CMOS Pin-to-Pin Improvement of 7-channel Darlington Array (For example:ULN2003A)
  • Power Efficient (Very low VOL)
    • Less Than 4 Times Lower VOL at 100 mA Than DarlingtonArray
  • Very Low Output Leakage < 10 nA Per Channel
  • Extended Ambient Temperature Range:TA = –40°C to +125°C
  • High-Voltage Outputs 30 V
  • Compatible with 1.8-V to 5-V Microcontroller and Logic Interface
  • Internal Free-wheeling Diodes for Inductive Kick-back Protection
  • Input Pull-down Resistors Allows Tri-stating the Input Driver
  • Input RC-Snubber to Eliminate Spurious Operation in Noisy Environment
  • Inductive Load Driver Applications
  • ESD Protection Exceeds JESD 22
    • 2-kV HBM, 500-V CDM
  • Available in 16-pin SOIC and TSSOPpackages

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Description

The TPL7407LA is a high-voltage, high-current NMOS transistor array. This device consistsof seven NMOS transistors that feature high-voltage outputs with common-cathode clamp diodes forswitching inductive loads. The maximum drain-current rating of a single NMOS channel is 600 mA. Newregulation and drive circuitry added to give maximum drive strength across all GPIO ranges (1.8 V–5V).The transistors can be paralleled for higher current capability.

The TPL7407LA key benefit is its improved power efficiency and lower leakage than aBipolar Darlington Implementation. With the lower VOL the user isdissipating less than half the power than traditional relay drivers with currents less than 250 mAper channel.

TPL7407LADR Block Diagram
(Picture: Diagram)

Technical Parameters

  • Mounting Style
  • SMD/SMT
  • Package/Case
  • SOIC-16
  • Product
  • Relay Drivers
  • Number of Drivers
  • 7 Driver
  • Output Current
  • 600 mA
  • Configuration
  • Low-Side
  • Supply Voltage Max
  • 30 V
  • Supply Voltage Min
  • 6.5 V
  • Propagation Delay Max
  • Minimum Operating Temperature
  • - 40 C
  • Maximum Operating Temperature
  • + 125 C
  • Type
  • Low Side
  • Series
  • TPL7407LA
  • Packaging
  • Cut Tape, eel, Reel

TPL7407LADR Documents

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