Network Controller & Processor ICs Neuron Chip w/ 2 KB EEPROM
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TMPN3120FE3MG Product Details
The TMPN3120FE3MG features extra single-chip memory in the form of a 2 Kbyte EEPROM, a 2 Kbyte SRAM, and a 16 Kbyte ROM.
Neuron Chips have all the built-in communications and control functions required to implement LONWORKS® nodes. These nodes may then be easily integrated into highly reliable distributed intelligent control networks.
The typical functions for this chip are described below.
● Main features of the 20 MHz Neuron Chip (compared with the TMPN3120E1M)
• Increased communication speed
- The maximum transmission speed has been increased twofold: 1.25 Mbps → 2.5 Mbps (This value applies to Single-Ended Mode only.)
• Shortened response time
- The amount of time required from I/O input to I/O output has been greatly reduced.
- Maximum speed: 7 ms → 3 to 4 ms
• Increased I/O object speed
- The execution time for all objects has been halved.
- Example) Serial I/O 9600 bps, Parallel I/O 1.2 µs/byte
● I/O functions
• Eleven programmable I/O pins
• Two programmable 16-bit timers and counters built in
• More than thirty different types of I/O functions to handle a wide range of input and output
• ROM firmware image containing preprogrammed I/O drivers, greatly simplifying application programs
● Network functions
• Two CPUs for communication protocol processing built in The communications and application CPUs execute in parallel.
• Equipped with a built-in LonTalk protocol supporting all seven levels of the ISO OSI reference model
• The ROM firmware image contains a complete network operating system, greatly simplifying application programs.
• Built-in twisted-pair wire transceiver
• Equipped with communications modes and communication speeds to support various types of external transceivers
• Communication port transceiver modes and logical addresses are stored within the EEPROM. Can be amended via the network.
● Other functions
• Application programs are also stored within the EEPROM. Can be updated by downloading over the network.
• Built-in watchdog timer
• Each chip has a unique ID number.
- Effective during the logical installation of networks
• Low electrical consumption mode supported through a sleep mode
• Reset time
- Prolongs the power-on reset time for at least 50 ms and keeps the operation stable during that time.
• High-impedance communication port (CP0 to CP3) when powered down
- The communication port pins (CP0 to CP3) attain high impedance when the Neuron Chip is powered down.
- This feature eliminates the need for an external relay.
• Built-in low-voltage detection circuit
- Prevents incorrect operations and writing errors in the EEPROM during drops in power voltage.
- An external LVD must be used to assert reset at a power supply voltage below 4.5 V if the Neuron Chip is operated at 20 MHz.
• The package is SOP32-P-525-1.27 (lead-free type).
- Number of bits
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