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Freescale 32-bit MCU, Power Arch core, 1.5MB Flash, 66MHz, -40/+125degC, Automotive Grade, QFP 144
| Manufacturer : | NXP Semiconductor |
|---|---|
| Package/Case : | 144-LQFP |
| Product Categories : | Microprocessors and Microcontrollers , Microcontrollers (MCU) |
| Datasheet: | SPC5517EBMLQ66R Datasheet (PDF) |
| RoHs Status: | Lead free / RoHS Compliant |
| In-stock: | 1 |
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SPC5517EBMLQ66R Product Details
MPC5510 Family Features Single issue, 32-bit CPU core complex (e200z1) � Compliant with the Power ArchitectureTM embedded category � Includes an instruction set enhancement allowing variable length encoding (VLE) for code size footprint reduction. With the optional encoding of mixed 16-bit and 32-bit instructions, it is possible to achieve significant code size footprint reduction. to 1.5-Mbyte on-chip flash with flash control unit (FCU) to 80 Kbytes on-chip SRAM Memory protection unit (MPU) with up to sixteen region descriptors and 32-byte region granularity Interrupt controller (INTC) capable of handling selectable-priority interrupt sources Frequency modulated Phase-locked loop (FMPLL) Crossbar switch architecture for concurrent access to peripherals, flash, or RAM from multiple bus masters 16-channel enhanced direct memory access controller (eDMA) Boot assist module (BAM) supports internal flash programming via a serial link (CAN or SCI) Timer supports input/output channels providing a range of 16-bit input capture, output compare, and pulse width modulation functions 40-channel 12-bit analog-to-digital converter (ADC) Up to four serial peripheral interface (DSPI) modules Media Local Bus (MLB) emulation logic (works with two DSPIs, the e200z0, the eDMA, and system RAM to create 5-pin 256Fs MLB protocol) Up to eight serial communication interface (eSCI) modules Up to six enhanced full CAN (FlexCAN) modules with configurable buffers One inter IC communication interface (I2C) module
to 144 configurable general purpose pins supporting input and output operations and 3.0V through 5.5V supply levels Real-time counter (RTC_API) with clock source from external 32-kHz crystal oscillator, internal or 16-MHz oscillator and supporting wake-up with selectable 1-second resolution and > 1-hour timeout, or 1-millisecond resolution with maximum timeout of one second Up to eight periodic interrupt timers (PIT) with 32-bit counter resolution Nexus development interface (NDI) per IEEE-ISTO 5001-2003 Class Two Plus standard Device/board test support per Joint Test Action Group (JTAG) of IEEE (IEEE 1149.1) On-chip voltage regulator (VREG) for regulation of 5V input to 1.5V and 3.3V internal supply levels Optional e200z0, second Power Architecture based I/O processor with VLE instruction set Optional FlexRAY controller Optional external bus interface (EBI) module
This document contains information on a product under development. Freescale reserves the right to change or discontinue this product without notice. � Freescale Semiconductor, Inc., 2007-2009. All rights reserved.
1 Pin Assignments and Reset States.4 1.1 Signal Properties and Multiplexing Summary.4 1.2 Power and Ground Supply Summary.15 1.3 Pinout LQFP.17 1.4 Pinout LQFP.18 1.5 Pinout 208 PBGA.19 Electrical Characteristics.20 2.1 Maximum Ratings.20 2.2 Thermal Characteristics.21 2.2.1 General Notes for Specifications at Maximum Junction Temperature.21 2.3 ESD 2.4 DC Electrical Specifications.25 2.5 Operating Current Specifications.27 2.6 I/O Pad Current Specifications.29 2.7 Low Voltage Characteristics.30 2.8 Oscillators Electrical Characteristics.31 2.9 FMPLL Electrical Characteristics.33 2.10 eQADC Electrical Characteristics.34 2.11 Flash Memory Electrical Characteristics.35 2.12 Pad Timing.37 2.13.1 Reset and Boot Configuration Pins.37 2.13.2 External Interrupt (IRQ) and Non-Maskable Interrupt (NMI) Pins.37 2.13.3 JTAG (IEEE Interface.38 2.13.4 Nexus Debug Interface.41 2.13.5 External Bus Interface (EBI).43 2.13.6 Enhanced Modular I/O Subsystem (eMIOS).46 2.13.7 Deserial Serial Peripheral Interface (DSPI).47 Package Information.52 Product Documentation.52 4.1 Revision History.53 Table 13. 5V Low Frequency (32 kHz) Internal RC Oscillator. 32 Table 14. FMPLL Electrical Specifications. 33 Table 15. eQADC Conversion Specifications (Operating). 34 Table 16. Flash Program and Erase Specifications. 35 Table 17. Flash EEPROM Module Life (Full Temperature Range) 35 Table 18. Pad AC Specifications (VDDE 5.5V). 36 Table 19. Reset and Boot Configuration Timing. 37 Table 20. IRQ/NMI Timing. 37 Table 21. JTAG Interface Timing. 38 Table 22. Nexus Debug Port Timing. 41 Table 23. External Bus Operation Timing. 43 Table 24. eMIOS Timing. 46 Table 25. DSPI Timing. 47 Table 26. Package Information. 52 Table 27. Revision History of MPC5510 Data Sheet. 53
Figure 1. MPC5510 Family Block Diagram. 3 Figure 2. MPC5510 Pinout � 144 LQFP. 17 Figure 3. MPC5510 Pinout � 176 LQFP. 18 Figure 4. MPC5510 Pinout � 208 PBGA. 19 Figure 5. Pad Output Delay. 36 Figure 6. Reset and Boot Configuration Timing. 37 Figure 7. IRQ and NMI Timing. 37 Figure 8. JTAG Test Clock Input Timing. 38 Figure 9. JTAG Test Access Port Timing. 39 Figure 10. JTAG JCOMP Timing. 39 Figure 11. JTAG Boundary Scan Timing. 40 Figure 12. Nexus Output Timing. 41 Figure 13. Nexus TDI, TMS, TDO Timing. 42 Figure 14. CLKOUT Timing. 43 Figure 15. Synchronous Output Timing. 44 Figure 16. Synchronous Input Timing. 45 Figure 17. Address Latch Enable (ALE) Timing. 46 Figure 18. DSPI Classic SPI Timing Master, CPHA 0. 48 Figure 19. DSPI Classic SPI Timing Master, CPHA 1. 48 Figure 20. DSPI Classic SPI Timing Slave, CPHA 0. 49 Figure 21. DSPI Classic SPI Timing Slave, CPHA 1. 49 Figure 22. DSPI Modified Transfer Format Timing Master, CPHA 0. 50 Figure 23. DSPI Modified Transfer Format Timing Master, CPHA 1. 50 Figure 24. DSPI Modified Transfer Format Timing Slave, CPHA 0 51 Figure 25. DSPI Modified Transfer Format Timing Slave, CPHA 1 51 Figure 26. DSPI PCS Strobe (PCSS) Timing. 51
Table 1. MPC5510 Signal Properties.4 Table MPC5510 Power/Ground.15 Table 3. Absolute Maximum Ratings.20 Table 4. Thermal Characteristics.21 Table 5. ESD Ratings,.24 Table 6. DC Electrical Specifications.25 Table 7. Operating Currents.27 Table 8. I/O Pad Average DC Current.29 Table 9. Low Voltage Monitors.30 Table 10. 3.3V High Frequency External Oscillator.31 Table 11. 5V Low Frequency (32 kHz) External Oscillator.31 Table 12. 5V High Frequency (16 MHz) Internal RC Oscillator.32
MPC5510 Microcontroller Family Data Sheet, Rev. 3 2 Freescale SemiconductorOscillators e200z1 Core Integer Execution Unit Multiply Unit Instruction Unit PPC & VLE General Purpose Registers x 32-bit) Timers JTAG Branch Unit Load/Store Unit FlexRay Instruction Bus Data Bus eDMA Instruction Unit VLE NDI
INTC e200z0 Core Integer Execution Unit Multiply Unit General Purpose Registers x 32-bit)Crossbar Switch (XBAR) Private Instruction Bus Memory Protection Unit (MPU)
ADC BAM EBI ECC DSPI eDMA eMIOS200 eSCI FCU FlexCAN � Analog to Digital Converter modules � Boot Assist Module � External Bus Interface module � Error Correction Code � Serial Peripherals Interface controller module � enhanced Direct Memory Controller module � Timed Input Output module � Serial Communications Interface modules � Flash Controller Unit � Controller Area Network controller modules FlexRay � Dual Channel FlexRay controller FMPLL � Frequency Modulated Phase Locked Loop module 2C � Inter IC Controller modules INTC � Interrupt Controller module JTAG � Joint Test Action Group interface MLB � Media Local Bus emulation logic NDI � Nexus Debug Interface module PIT � Periodic Interrupt Timer module SIU � System Integration module VREG � Voltage Regulator
MPC5510 Microcontroller Family Data Sheet, Rev. 3 Freescale Semiconductor 3Technical Parameters
- Life Cycle Stage
- ACTIVE
- Clock Speed
- 40 MHz
- ROM Type
- Flash
- Supply Voltage
- 4.5 to 5.25 volts
- I/O Ports
- 111
- Package Type
- LFQP, Other, 20 X 20 MM, 1.40 MM HEIGHT, 0.5MM PITCH, ROHS COMPLIANT, LQFP-144
- Operating Range
- Auto
- Pin Count
- 144
- Operating Temperature
- -40 to 125 C (-40 to 257 F)
- Features
- DMA
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