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SN74AS373N PDIP-20
TI
  • SN74AS373N
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SN74AS373N

Latch, 74AS373, D Type Transparent, Tri State, 6 ns, 24 mA, DIP

Manufacturer :
Texas Instruments, Inc
Package/Case :
PDIP-20
Product Categories :
Latches
Datasheet:
SN74AS373N PDF
RoHs Status:
Rohs
Marking Code:
SN74AS373N
In-stock:
2460

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SN74AS373N Product Details

These octal transparent D-type latches feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.

While the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is taken low, the Q outputs are latched at the logic levels set up at the D inputs.

A buffered output-enable (OE)\ input can be used to place the eight outputs in either a normal logic state (high or low) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and the increased drive provide the capability to drive bus lines without interface or pullup components.

OE\ does not affect internal operations of the latches. Old data can be retained or new data can be entered while the outputs are off.

Feature

  • Eight Latches in a Single Package
  • 3-State Bus-Driving True Outputs
  • Full Parallel Access for Loading
  • Buffered Control Inputs
  • pnp Inputs Reduce dc Loading on Data Lines
Description

These octal transparent D-type latches feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.

While the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is taken low, the Q outputs are latched at the logic levels set up at the D inputs.

A buffered output-enable (OE)\ input can be used to place the eight outputs in either a normal logic state (high or low) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and the increased drive provide the capability to drive bus lines without interface or pullup components.

OE\ does not affect internal operations of the latches. Old data can be retained or new data can be entered while the outputs are off.

Technical Parameters

Number of Circuits 8 Supply Voltage Min 4.5 V
Logic Type D-Type Latch Maximum Operating Temperature + 70 C
Logic Family AS Minimum Operating Temperature 0 C
Polarity Non-Inverting Package / Case PDIP-20
Number of Output Lines 8 Packaging Tube
High Level Output Current - 15 mA Mounting Style Through Hole
Low Level Output Current 32 mA Number of Input Lines 8
Propagation Delay Time 6 ns at 4.5 V to 5.5 V Factory Pack Quantity 20
Supply Voltage Max 5.5 V Supply Current 90 mA

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  • ****ia Sjo*****
    2020-03-28

    Alles super!! Perfekt!!!

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Texas Instruments, Inc

TI
Texas Instruments Incorporated designs and manufactures analog technologies, digital signal processing (DSP) and microcontroller (MCU) semiconductors. TI is a leader in semiconductor solutions for ana...
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