Products > Integrated Circuits (ICs) > Counter ICs > SN74ALS561ADWRE4
SN74ALS561ADWRE4 SOIC-20
TI
  • SN74ALS561ADWRE4
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SN74ALS561ADWRE4

Synchronous 4-Bit Binary Counters With 3-State Outputs 20-SOIC 0 to 70,Counter ICs Sync 4-Bit Binary Counter W/3-St Otpt

Manufacturer :
Texas Instruments, Inc
Package/Case :
SOIC-20
Product Categories :
Counter ICs
Datasheet:
SN74ALS561ADWRE4 PDF
RoHs Status:
Rohs
In-stock:
180

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SN74ALS561ADWRE4 Product Details

These binary counters are programmable and offer synchronous and asynchronous clearing as well as synchronous and asynchronous loading. All synchronous functions are executed on the positive-going edge of the clock.

The clear function is initiated by applying a low level to either asynchronous clear (ACLR\) or synchronous clear (SCLR\). ACLR\ (direct clear) overrides all other functions of the device, while SCLR\ overrides only the other synchronous functions. Data is loaded from the A, B, C, and D inputs by applying a low level to asynchronous load (ALOAD\) or by the combination of a low level at synchronous load (SLOAD\) and a positive-going clock transition. The counting function is enabled only when enable P (ENP), enable T (ENT), ACLR\, ALOAD\, SCLR\, and SLOAD\ are all high.

A high level at the output-enable () input forces the Q outputs into the high-impedance state, and a low level enables those outputs. Counting is independent of OE\. ENT is fed forward to enable the ripple-carry output (RCO) to produce a high-level pulse while the count is maximum (15). The clocked carry output (CCO) produces a high-level pulse for a duration equal to that of the low level of the clock when RCO is high and the counter is enabled (ENP and ENT are high); otherwise, CCO is low. CCO does not have the glitches commonly associated with a ripple-carry output. Cascading is normally accomplished by connecting RCO or CCO of the first counter to ENT of the next counter. However, for very high-speed counting, RCO should be used for cascading because CCO does not become active until the clock returns to the low level.

The SN54ALS561A is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ALS561ADWRE4 is characterized for operation from 0°C to 70°C.

Feature

  • Carry Output for n-Bit Cascading
  • Buffer-Type Outputs Drive Bus Lines Directly
  • Choice of Asynchronous or Synchronous Clearing and Loading
  • Internal Look-Ahead Circuitry for Fast Cascading
  • Package Options Include Plastic Small-Outline (DW) Packages,Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic(J) 300-mil DIPs

Technical Parameters

Counter Type Binary Counters Operating Temperature Range 0 C to + 70 C
Logic Family TTL Package / Case SOIC-20
Number of Bits 4 Packaging Reel
Counting Method Asynchronous Mounting Style SMD/SMT
Operating Supply Voltage 4.5 V to 5.5 V Factory Pack Quantity 1

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