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LS1012A

LPC microcontrollers based on ARM� Cortex�-M0+/M0 Cores

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LS1012A
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Datasheet :
LS1012A PDF
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Stock : 2296
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LS1012A
NXP
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Estimated Delivery Time: Oct 25 - Oct 30 days (choose Expedited at checkout).
Manufacturer:
NXP
Datasheet:
LS1012A PDF

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Product Details

LPC microcontrollers based on ARM Cortex-M0+ and M0 cores are the smallest, most energy-efficient LPC MCUs available. Both cores offer exceptionally small silicon area, low power, and minimal code footprint while retaining tool and binary compatibility with higher speed, feature-rich cores such as the Cortex-M3 and M4/M4F. The LPC portfolio includes three series of MCUs based on Cortex-M0+ or M0 cores including: 32-bit performance in a 16-bit footprint resulting in more power efficiency and longer battery life, plus performance headroom for product enhancements Fast interrupt handling for critical control applications Small size enables the processor and analog circuits to be implemented on single die Wake-up Interrupt Controller enables ultra-low leakage retention mode with instantaneous, fully-active mode for critical events Lower cost devices through a smaller processing core, system and memories Enhanced system debug for faster development Ultra-low power consumption and integrated sleep modes resulting in longer battery life 100 % C-coding including interrupt handlers and boot code to ease system development; Zero assembler code required Thumb� instruction set for maximum code density Wide application envelope encompassing ultra-low cost microcontrollers and analog mixed signal applications

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