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10/100 Non-PCI Ethernet Single Chip MAC + PHY

Manufacturer : Microchip Technology, Inc
Package/Case : TQFP-100
Product Categories : Ethernet ICs
Datasheet: LAN91C111I-NE Datasheet (PDF)
RoHs Status: Lead free/RoHS Compliant
In-stock: 1


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LAN91C111I-NE Product Details

The Microchip LAN91C111I-NE is designed to facilitate the implementation of a third generation of Fast Ethernet connectivity solutions for embedded applications. For this third generation of products, flexibility and integration dominate the design requirements. The LAN91C111I-NE is a mixed signal Analog/Digital device that implements the MAC and PHY portion of the CSMA/CD protocol at 10 and 100 Mbps. The design will also minimize data throughput constraints utilizing a 32-bit, 16-bit or 8-bit bus Host interface in embedded applications. The total internal memory FIFO buffer size is 8 Kbytes, which is the total chip storage for transmit and receive operations.
The Microchip LAN91C111I-NE is software compatible with the LAN9000 family of products. 
Memory management is handled using a patented optimized MMU (Memory Management Unit) architecture and a 32-bit wide internal data path. This I/O mapped architecture can sustain back-to- frame transmission and reception for superior data throughput and optimal performance. It also dynamically allocates buffer memory in an efficient buffer utilization scheme, reducing software tasks and relieving the host CPU from performing these housekeeping functions.
The Microchip LAN91C111I-NE provides a flexible slave interface for easy connectivity with industry-standard buses. The Bus Interface Unit (BIU) can handle synchronous as well as asynchronous transfers, with different signals being used for each one. Asynchronous bus support for ISA is supported even though ISA cannot sustain 100 Mbps traffic. Fast Ethernet data rates are attainable for ISA-based nodes on the basis of the aggregate traffic benefits.
Two different interfaces are supported on the network side. The first Interface is a standard Magnetics transmit/receive pair interfacing to 10/100Base-T utilizing the internal physical layer block. The second interface follows the MII (Media Independent Interface) specification standard, consisting of 4 bit wide data transfers at the nibble rate. This interface is applicable to 10 Mbps standard Ethernet or 100 Mbps Ethernet networks. Three of the LAN91C111’s pins are used to interface to the two-line MII serial management protocol.
The Microchip LAN91C111I-NE integrates IEEE 802.3 Physical Layer for twisted pair Ethernet applications. The PHY can be configured for either 100 Mbps (100Base-TX) or 10 Mbps (10Base-T) Ethernet operation. The Analog PHY block consists of a 4B5B/Manchester encoder/decoder, scrambler/de-scrambler, transmitter with wave shaping and output driver, twisted pair receiver with on chip equalizer and baseline wander correction, clock and data recovery, Auto-Negotiation, controller interface (MII), and serial port (MI). Internal output wave shaping circuitry and on-chip filters eliminate the need for external filters normally required in 100Base-TX and 10Base-T applications.
The LAN91C111I-NE can automatically configure itself for 100 or 10 Mbps and Full or Half Duplex operation with the on-chip Auto-Negotiation algorithm. The LAN91C111I-NE is ideal for media interfaces for embedded application desiring Ethernet connectivity as well as 100Base-TX/10Base-T adapter cards, motherboards, repeaters, switching hubs. The LAN91C111I-NE operates from a single 3.3V




    • Single Chip Ethernet Controller
    • Dual Speed - 10/100 Mbps
    • Fully Supports Full Duplex Switched Ethernet
    • Supports Burst Data Transfer
    • 8 Kbytes Internal Memory for Receive and Transmit FIFO Buffers
    • Enhanced Power Management Features
    • Optional Configuration via Serial EEPROM Interface
    • Supports 8, 16 and 32 Bit CPU Accesses
    • Internal 32 Bit Wide Data Path (into Packet Buffer Memory)
    • Built-in Transparent Arbitration for Slave Sequential Access Architecture
    • Flat MMU Architecture with Symmetric Transmit and Receive Structures and Queues
    • 3.3V Operation with 5V Tolerant I/O Buffers
    • Single 25 MHz Reference Clock for Both PHY and MAC
    • External 25 MHz Output Pin for an External PHY Supporting PHY's Physical Media
    • Low Power CMOS Design
    • Supports Multiple Embedded Processor Host Interfaces
      • ARM
      • SH
      • Power PC
      • Coldfire
      • 680X0, 683XX
      • MIPS R3000
    • 3.3V MII (Media Independent Interface) MAC-PHY Interface Running at Nibble Rate
    • MII Management Serial Interface
    • 128 Pin QFP RoHS compliant package
    • 128 Pin TQFP 1.0 mm height RoHS compliant package
    • Commercial Temperature Range from 0°C to 70°C (LAN91C111)
    • Industrial Temperature Range from -40°C to 85°C (LAN91C111i)
    Network Interface

    • Fully Integrated IEEE 802.3/802.3u - 100BASE-TX/10BASE-T Physical Layer
    • Auto Negotiation: 10/100, Full/Half Duplex
    • On Chip Wave Shaping - No External Filters Required
    • Adaptive Equalizer
    • Baseline Wander Correction
    • LED Outputs (User Selectable - Up to Two LED Functions at One Time)
      • Link
      • Activity
      • Full Duplex
      • 10/100
      • Transmit
      • Receive

LAN91C111I-NE Products

LAN91C111I-NE Pinout
(Picture: Pinout)

LAN91C111I-NE Block Diagram
(Picture: Diagram)

Technical Parameters

  • Product
  • Ethernet Controllers
  • Number of Transceivers
  • 1
  • Data Rate
  • 10 Mb/s, 100 Mb/s
  • Supply Voltage Max
  • 5 V
  • Supply Voltage Min
  • 0 V
  • Maximum Operating Temperature
  • + 85 C
  • Package / Case
  • TQFP-100
  • Ethernet Connection Type
  • 10 Base-T, 100 Base-TX
  • Maximum Supply Current
  • 140 mA
  • Minimum Operating Temperature
  • - 40 C
  • Mounting Style
  • Factory Pack Quantity
  • 450
  • Standard Supported
  • 802.3, 802.3u
  • Type
  • Single Chip MAC and PHY

LAN91C111I-NE Datasheet

  • LAN91C111 Technical Documentation of Application Note
  • LAN91C111 Technical Documentation of Application Note

LAN91C111I-NE Equivalent Parts

For the LAN91C111I-NE component, you may consider these replacement and alternative parts.

Models Manufacturer Package/Case Description

LAN91C111I-NE Related Products

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Microchip Technology, Inc

Microchip Technology Inc. is a leading manufacturer of microcontroller and analog products, providing low-risk product development, lower total system cost, and faster time to market for thousands of diverse customer applications worldwide. Microchip offers outstanding technical support along with d...
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