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ISPLSI1032-60LG/883

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In-System Programmable High Density PLD

  • Package/Case :
  • PGA84
  • Product Categories :
  • CPLD ispLSI 1000 Family
  • RoHs Status:
  • Lead free / RoHS Compliant
  • Marking Code:
  • ISPLSI1032-60LG
  • In-stock:
  • 100

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ISPLSI1032-60LG/883 Product Details

Description 

The ispLSI and pLSI 1032 are High-Density Programmable Logic Devices containing 192 Registers, 64 Universal I/O pins, eight Dedicated Input pins, four Dedicated Clock Input pins and a Global Routing Pool (GRP). The GRP provides complete interconnectivity between all of these elements. The ispLSI 1032 features 5-Volt insystem programming and in-system diagnostic capabilities. It is the first device which offers non-volatile "on-the-fly" reprogrammability of the logic, as well as the interconnect to provide truly reconfigurable systems. It is architecturally and parametrically compatible to the pLSI 1032 device, but multiplexes four of the dedicated input pins to control in-system programming.

The basic unit of logic on the ispLSI and pLSI 1032 devices is the Generic Logic Block (GLB). The GLBs are labeled A0, A1 .. D7 . There are a total of 32 GLBs in the ispLSI and pLSI 1032 devices. Each GLB has 18 inputs, a programmable AND/OR/XOR array, and four outputs which can be configured to be either combinatorial or registered. Inputs to the GLB come from the GRP and dedicated inputs. All of the GLB outputs are brought back into the GRP so that they can be connected to the inputs of any other GLB on the device.

Features

• HIGH-DENSITY PROGRAMMABLE LOGIC 

— High Speed Global Interconnect 

— 6000 PLD Gates 

— 64 I/O Pins, Eight Dedicated Inputs 

— 192 Registers 

— Wide Input Gating for Fast Counters, State Machines, Address Decoders, etc. 

— Small Logic Block Size for Fast Random Logic 

— Security Cell Prevents Unauthorized Copying 

• HIGH PERFORMANCE E2CMOS® TECHNOLOGY 

— fmax = 90 MHz Maximum Operating Frequency 

— fmax = 60 MHz for Industrial and Military/883 Devices 

— tpd = 12 ns Propagation Delay 

— TTL Compatible Inputs and Outputs 

— Electrically Erasable and Reprogrammable 

— Non-Volatile E2 CMOS Technology 

— 100% Tested 

• ispLSI OFFERS THE FOLLOWING ADDED FEATURES 

— In-System Programmable™ (ISP™) 5-Volt Only 

— Increased Manufacturing Yields, Reduced Time-toMarket, and Improved Product Quality 

— Reprogram Soldered Devices for Faster Prototyping 

• COMBINES EASE OF USE AND THE FAST SYSTEM SPEED OF PLDs WITH THE DENSITY AND FLEX- IBILITY OF FIELD PROGRAMMABLE GATE ARRAYS 

 — Complete Programmable Device Can Combine Glue Logic and Structured Designs 

— Four Dedicated Clock Input Pins 

— Synchronous and Asynchronous Clocks 

— Flexible Pin Placement 

— Optimized Global Routing Pool Provides Global Interconnectivity 

• ispLSI AND pLSI DEVELOPMENT TOOLS pDS® Software 

— Easy to Use PC Windows™ Interface 

— Boolean Logic Compiler 

— Manual Partitioning 

— Automatic Place and Route 

— Static Timing Table ispDS+™ Software 

 — Industry Standard, Third Party Design Environments 

— Schematic Capture, State Machine, HDL 

— Automatic Partitioning and Place and Route 

— Comprehensive Logic and Timing Simulation 

— PC and Workstation Platforms

ISPLSI1032-60LG/883

Feature

• HIGH-DENSITY PROGRAMMABLE LOGIC
— High Speed Global Interconnect
— 6000 PLD Gates
— 64 I/O Pins, Eight Dedicated Inputs
— 192 Registers
— Wide Input Gating for Fast Counters, State Machines, Address Decoders, etc.
— Small Logic Block Size for Fast Random Logic

— Security Cell Prevents Unauthorized Copying

• HIGH PERFORMANCE E2CMOS® TECHNOLOGY
— fmax = 90 MHz Maximum Operating Frequency
— fmax = 60 MHz for Industrial and Military/883 Devices
— tpd = 12 ns Propagation Delay
— TTL Compatible Inputs and Outputs
— Electrically Erasable and Reprogrammable
— Non-Volatile E2CMOS Technology
— 100% Tested
• IN-SYSTEM PROGRAMMABLE
— In-System Programmable™ (ISP™) 5-Volt Only
— Increased Manufacturing Yields, Reduced Time-to Market, and Improved Product Quality
— Reprogram Soldered Devices for Faster Prototyping
• COMBINES EASE OF USE AND THE FAST SYSTEM SPEED OF PLDs WITH THE DENSITY AND FLEX- IBILITY OF FIELD PROGRAMMABLE GATE ARRAYS
— Complete Programmable Device Can Combine Glue Logic and Structured Designs
— Four Dedicated Clock Input Pins
— Synchronous and Asynchronous Clocks
— Flexible Pin Placement

— Optimized Global Routing Pool Provides Global Interconnectivity

• ispDesignEXPERT™ – LOGIC COMPILER AND COMPLETE ISP DEVICE DESIGN SYSTEMS FROM HDL SYNTHESIS THROUGH IN-SYSTEM PROGRAMMING
— Superior Quality of Results
— Tightly Integrated with Leading CAE Vendor Tools
— Productivity Enhancing Timing Analyzer, Explore Tools, Timing Simulator and ispANALYZER™
— PC and UNIX Platforms




ISPLSI1032-60LG/883 Pinout
(Picture: Pinout)

ISPLSI1032-60LG/883 Block Diagram
(Picture: Diagram)

Technical Parameters

  • Manufacturer
  • LATTICE
  • Packing
  • Tape & Reel (TR)/Cut Tape (CT)/Tray/Tube
  • RoHs Status
  • Lead free / RoHS Compliant
  • Package/Case
  • PGA84

ISPLSI1032-60LG/883 Documents

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    2020-02-28

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We have a professional business development department to strictly test and verify the qualifications of LATTICE original manufacturers and agents. All LATTICE suppliers must pass the qualification review before they can publish their ISPLSI1032-60LG/883 devices; we pay more attention to the channels and quality of ISPLSI1032-60LG/883 products than any other customer. We strictly implement supplier audits, so you can purchase with confidence.
Q: How to find the detailed information of ISPLSI1032-60LG/883 chips? Including LATTICE original factory information, CPLD ispLSI 1000 Family application, ISPLSI1032-60LG/883 pictures?
You can use Jotrin's intelligent search engine, or filter by CPLD ispLSI 1000 Family category, or find it through Lattice Semiconductor Corp Information page.
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(1)Such as a deficiency in quantity, delivery of wrong items, and apparent external defects (breakage and rust, etc.), and we acknowledge such problems.
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