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EP2S130F1020I4

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FPGA Stratix II Family 132540 Cells 711.24MHz 90nm (CMOS) Technology 1.2V 1020Pin FC-FBGA

  • Package/Case :
  • FBGA-1020
  • Product Categories :
  • FPGA - Field Programmable Gate Array
  • RoHs Status:
  • Lead free/RoHS Compliant
  • In-stock:
  • 18

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EP2S130F1020I4 Product Details

The Stratix® II FPGA family is based on a 1.2-V, 90-nm, all-layer copper SRAM process and features a new logic structure that maximizes performance, and enables device densities approaching 180,000 equivalent logic elements (LEs). Stratix II devices offer up to 9 Mbits of on-chip, TriMatrix™ memory for demanding, memory intensive applications and has up to 96 DSP blocks with up to 384 (18-bit × 18-bit) multipliers for efficient implementation of high performance filters and other DSP functions. Various high-speed external memory interfaces are supported, including double data rate (DDR) SDRAM and DDR2 SDRAM, RLDRAM II, quad data rate (QDR) II SRAM, and single data rate (SDR) SDRAM. Stratix II devices support various I/O standards along with support for 1-gigabit per second (Gbps) source synchronous signaling with DPA circuitry. Stratix II devices offer a complete clock management solution with internal clock frequency of up to 550 MHz and up to 12 phase-locked loops (PLLs). Stratix II devices are also the industry’s first FPGAs with the ability to decrypt a configuration bitstream using the Advanced Encryption Standard (AES) algorithm to protect designs.

EP2S130F1020I4

Feature

The Stratix II family offers the following features:

■ New and innovative adaptive logic module (ALM), the basic building block of the Stratix II architecture, maximizes performance and resource usage efficiency

■ Up to 9,383,040 RAM bits (1,172,880 bytes) available without reducing logic resources

■ TriMatrixmemory consisting of three RAM block sizes to implement true dual-port memory and first-in first-out (FIFO) buffers

■ High-speed DSP blocks provide dedicated implementation of multipliers (at up to 450 MHz), multiply-accumulate functions, and finite impulse response (FIR) filters

■ Up to 16 global clocks with 24 clocking resources per device region

■ Clock control blocks support dynamic clock network enable/disable, which allows clock networks to power down to reduce power consumption in user mode

■ Up to 12 PLLs (four enhanced PLLs and eight fast PLLs) per device provide spread spectrum, programmable bandwidth, clock switchover, real-time PLL reconfiguration, and advanced multiplication and phase shifting

Technical Parameters

  • Series
  • Stratix II
  • Number of Logic Blocks
  • 6627
  • Number of I/Os
  • 742
  • Operating Supply Voltage
  • 1.2 V to 3.3 V
  • Maximum Operating Temperature
  • + 85 C
  • Mounting Style
  • SMD/SMT
  • Package / Case
  • FBGA-1020
  • Distributed RAM
  • 6.7 Mbit
  • Minimum Operating Temperature
  • - 40 C
  • Operating Supply Current
  • 0.82 A
  • Packaging
  • Tray

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Ratings and Reviews (2)

  • 5 / 5
  • 5 Stars 100%
  • 4 Stars 0%
  • 3 Stars 0%
  • 2 Stars 0%
  • 1 Stars 0%
  • **hris***
    2020-03-28

    Alles bestens. Sehr gute Qualität, schnell geliefert. Danke !

  • **рий ***
    2019-08-04

    всё рабочее, спасибо.

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(1)Such as a deficiency in quantity, delivery of wrong items, and apparent external defects (breakage and rust, etc.), and we acknowledge such problems.
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Intel Corp

Intel
Intel Corporation is the world's largest semiconductor chip maker. Intel has been committed to the development of small, fast and energy-saving technologies to help mobile computing, desktop computin and data centers to achieve revolutionary advances in computing, and to promote fundamental changes...
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