CPLD Classic Family 900 Gates 48 Macro Cells 50MHz 5V 68-Pin PLCC
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EP1810LC-20T Product Details
The Altera ClassicTM device family offers a solution to high-speed, lowpower logic integration. Fabricated on advanced CMOS technology, Classic devices also have a Turbo-only version, which is described in this data sheet. Classic devices support 100% TTL emulation and can easily integrate multiple PAL- and GAL-type devices with densities ranging from 300 to 900 usable gates. The Classic family provides pin-to-pin logic delays as low as 10 ns and counter frequencies as high as 100 MHz. Classic devices are available in a wide range of packages, including ceramic dual in-line package (CerDIP), plastic dual in-line package (PDIP), plastic J-lead chip carrier (PLCC), ceramic J-lead chip carrier (JLCC), pin-grid array (PGA), and small-outline integrated circuit (SOIC) packages. EPROM-based Classic devices can reduce active power consumption without sacrificing performance. This reduced power consumption makes the Classic family well suited for a wide range of low-power applications. Classic devices are 100% generically tested devices in windowed packages and can be erased with ultra-violet (UV) light, allowing design changes to be implemented quickly.
Classic devices use sum-of-products logic and a programmable register. The sum-of-products logic provides a programmable-AND/fixed-OR structure that can implement logic with up to eight product terms. The programmable register can be individually programmed for D, T, SR, or JK flipflop operation or can be bypassed for combinatorial operation. In addition, macrocell registers can be individually clocked either by a global clock or by any input or feedback path to the AND array.
Altera’s proprietary programmable I/O architecture allows the designer to program output and feedback paths for combinatorial or registered operation in both active-high and active-low modes. These features make it possible to implement a variety of logic functions simultaneously. Classic devices are supported by Altera’s MAX+PLUS II development system, a single, integrated package that offers schematic, text—including VHDL, Verilog HDL, and the Altera Hardware Description Language (AHDL)—and waveform design entry, compilation and logic synthesis, simulation and timing analysis, and device programming. The MAX+PLUS II software provides EDIF 2 0 0 and 3 0 0, LPM, VHDL, Verilog HDL, and other interfaces for additional design entry and simulation support from other industry-standard PC- and workstationbased EDA tools. The MAX+PLUS II software runs on Windows-based PCs, as well as Sun SPARCstation, HP 9000 Series 700/800, and IBM RISC System/6000 workstations. These devices also contain on-board logic test circuitry to allow verification of function and AC specifications during standard production flow
■ Device erasure and reprogramming with non-volatile EPROM configuration elements
■ Fast pin-to-pin logic delays as low as 10 ns and counter frequencies as high as 100 MHz
■ 24 to 68 pins available in dual in-line package (DIP), plastic J-lead chip carrier (PLCC), pin-grid array (PGA), and small-outline integrated circuit (SOIC) packages
■ Programmable security bit for protection of proprietary designs
■ 100% generically tested to provide 100% programming yield
■ Programmable registers providing D, T, JK, and SR flipflops with individual clear and clock controls
■ Software design support featuring the Altera® MAX+PLUS® II development system on Windows-based PCs, as well as
Sun SPARCstation, HP 9000 Series 700/800, IBM RISC System/6000 workstations, and third-party development systems
■ Programming support with Altera’s Master Programming Unit
(MPU); programming hardware from Data I/O, BP Microsystems, and other third-party programming vendors
■ Additional design entry and simulation support provided by EDIF,
library of parameterized modules (LPM), Verilog HDL, VHDL, and other interfaces to popular EDA tools from manufacturers such as Cadence, Exemplar Logic, Mentor Graphics, OrCAD, Synopsys, Synplicity, and VeriBest
- Tape & Reel (TR)/Cut Tape (CT)/Tray/Tube
- RoHs Status
- Lead free / RoHS Compliant
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Estimated Delivery Time: Oct 03 - Oct 08 days (choose Expedited at checkout).
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Step4: Individual Packaging
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Step6: Bar-Code Shipping Tag
All the products will packing in anti-staticbag. Ship with ESD antistatic protection.
Outside ESD packing’s lable will use ourcompany’s information: Part Mumber, Brand and Quantity.
We will inspect all the goods before shipment,ensure all the products at good condition and ensure the parts are new originalmatch datasheet.
After all the goods are ensure no problems afterpacking, we will packing safely and send by global express. It exhibitsexcellent puncture and tear resistance along with good seal integrity.
1.We provide 90 days warranty.
2.If some of the items you received aren't of perfect quality, we would resiponsibly arrange your refund or replacement. But the items must remain their orginal condition.
- Q: How does Jotrin guarantee that EP1810LC-20T is the original manufacturer or agent of ALTERA?
- We have a professional business development department to strictly test and verify the qualifications of ALTERA original manufacturers and agents. All ALTERA suppliers must pass the qualification review before they can publish their EP1810LC-20T devices; we pay more attention to the channels and quality of EP1810LC-20T products than any other customer. We strictly implement supplier audits, so you can purchase with confidence.
- Q: How to find the detailed information of EP1810LC-20T chips? Including ALTERA original factory information, Classic EPLD Family application, EP1810LC-20T pictures?
- You can use Jotrin's intelligent search engine, or filter by Classic EPLD Family category, or find it through Altera Corporation (Intel) Information page.
- Q: Are the ALTERA's EP1810LC-20T price and stock displayed on the platform accurate?
- The ALTERA's inventory fluctuates greatly and cannot be updated in time, it will be updated periodically within 24 hours. After submitting an order for EP1810LC-20T, it is recommended to confirm the order with Jotrin salesperson or online customer service before payment.
- Q: Can I place an order offline?
Yes. We accept offline orders.
We can provide order placement service. You only need to log in, click "My Orders" to enter the transaction management, and you will see the "Order Details" interface. After checking it, select all and click "Place Order". In addition, you can enjoy coupons or other selected gifts when placing orders online.
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Customers can choose industry-leading freight companies, including DHL, FedEx, UPS, TNT, and Registered Mail.
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Note: It may take up to 24 hours before carriers will display tracking information. In normal conditions, Express delivery needs 3-5 days, Registered Mail needs 25-60 days.
- Q: What is the process for returns or replacement of EP1810LC-20T?
All goods will implement Pre-Shipment Inspection (PSI), selected at random from all batches of your order to do a systematic inspection before arranging the shipment.
If there is something wrong with the EP1810LC20T we delivered, we will accept the replacement or return of the EP1810LC-20T only when all of the below conditions are fulfilled:
(1)Such as a deficiency in quantity, delivery of wrong items, and apparent external defects (breakage and rust, etc.), and we acknowledge such problems.
(2)We are informed of the defect described above within 90 days after the delivery of EP1810LC-20T.
(3)The EP1810LC-20T is unused and only in the original unpacked packaging.
Two processes to return the products:
(1)Inform us within 90 days
(2)Obtain Requesting Return Authorizations
More details about return electronic components please see our Return & Change Policy.
- Q: How to contact us and get support, such as EP1810LC-20T datasheet pdf, EP1810 pin diagram?
- Need any After-Sales service, please feel free contact us: email@example.com
Altera Corporation (Intel)
- 1.Altera's Cyclone Family of Devices naming conventions
- 2.FPGAs and SoCs provide more than 4 million logic elements.
- 3.Non-Volatile FPGAs offer dual-configuration flash.
- 4.SoC development kit features ARM DS-5 Altera Edition toolkit
- 5.DC-DC power converter solutions improve system power efficiency by up to 35 percent
- 6.Altera FPGA Acceleration Solutions on Display at IDF15
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