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Low Power SRAM; Organization (word): 2M / 1M; Organization (bit): x 8 / x 16; Memory capacity (bit): 16M; Access time (ns): 70; Supply voltage (V): 2.7 to 3.6; Operating temperature (°C): 0 to 70; Package: μTSOP (52); Remarks: x 8 / x 16 sw,DAC (D/A Converters) 16B 1.0 GSPS 2-4x INTERPOLATING 2-CH
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DAC5682ZIRGCT Product Details
The DAC5682ZIRGCT is a dual-channel 16-bit 1.0 GSPS DAC with wideband LVDS data input, integrated 2x/4x interpolation filters, onboard clock multiplier, and internal voltage reference. The DAC5682ZIRGCT offers superior linearity, noise, crosstalk, and PLL phase noise performance.
The DAC5682ZIRGCT integrates a wideband LVDS port with on-chip termination. Full-rate input data can be transferred to a single DAC channel, or half-rate and 1/4-rate input data can be interpolated by onboard 2x or 4x FIR filters. Each interpolation FIR is configurable in either low-pass or high-pass mode, allowing selection of a higher order output spectral image. An on-chip delay lock loop (DLL) simplifies LVDS interfacing by providing skew control for the LVDS input data clock.
The DAC5682ZIRGCT allows both complex or real output. An optional Fs/4 coarse mixer in complex mode provides coarse frequency upconversion and the dual DAC output produces a complex Hilbert Transform pair. An external RF quadrature modulator then performs the final single sideband up-conversion. The interpolation filters and complex coarse mixers efficiently provide frequency plan flexibility while enabling higher output DAC rates to simplify image rejection filtering.
The DAC5682ZIRGCT is characterized for operation over the industrial temperature range of 40°C to 85°C and is available in a 64-pin QFN package. Other single-channel members of the family include the interpolating DAC5681Z and the noninterpolating DAC5681.
- 16-Bit Digital-to-Analog Converter (DAC)
- 1.0 GSPS Update Rate
- 16-Bit Wideband Input LVDS Data Bus
- 8 Sample Input FIFO
- Interleaved I/Q Data for Dual-DAC Mode
- High Performance
- 73-dBc ACLR WCDMA TM1 at 180 MHz
- 2x-32x Clock Multiplying PLL/VCO
- 2x or 4x Interpolation Filters
- Stopband Transition 0.4 to 0.6 Fdata
- Filters Configurable in Either Low-Pass or High-Pass
Mode Allows Selection of Higher Order Image
- Fs/4 Coarse Mixer
- On-Chip 1.2-V Reference
- Differential Scalable Output: 2 to 20 mA
- Package: 64-Pin 9-mm × 9-mm QFN
- Cellular Base Stations
- Broadband Wireless Access (BWA)
- WiMAX 802.16
- Fixed Wireless Backhaul
- Cable Modem Termination System (CMTS)
- Number of Converters
- Number of DAC Outputs
- Conversion Rate
- 1000 MSPs
- 16 bit
- Interface Type
- Parallel LVDS
- Settling Time
- 0.0104 us
- Maximum Operating Temperature
- + 85 C
- Mounting Style
- Package / Case
- Minimum Operating Temperature
- - 40 C
- Output Type
- Current Buffered
- Factory Pack Quantity
- Supply Voltage Max
- 3.6 V
- Supply Voltage Min
- 3 V
- Voltage Reference
- Internal or External
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1.We provide 90 days warranty.
2.If some of the items you received aren't of perfect quality, we would resiponsibly arrange your refund or replacement. But the items must remain their orginal condition.
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If there is something wrong with the DAC5682ZIRGCT we delivered, we will accept the replacement or return of the DAC5682ZIRGCT only when all of the below conditions are fulfilled:
(1)Such as a deficiency in quantity, delivery of wrong items, and apparent external defects (breakage and rust, etc.), and we acknowledge such problems.
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