Products > Integrated Circuits (ICs) > Logic ICs > CD4023BPWE4
CD4023BPWE4 TSSOP-14
TI
  • CD4023BPWE4
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CD4023BPWE4

Logic Gates CMOS Triple 3-Input NAND Gate

Manufacturer :
Texas Instruments, Inc
Package/Case :
TSSOP-14
Product Categories :
Logic Gates
Datasheet:
CD4023BPWE4 PDF
RoHs Status:
Rohs
In-stock:
200

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CD4023BPWE4 Product Details

CD4011B, CD4012B, and CD4023BPWE4 NAND gates provide the system designer with direct implementation of the NANDfunction and supplement the existing family of CMOS gates. All inputs and outputs are buffered.

The CD4011B, CD4012B, and CD4023BPWE4 types are supplied in 14-lead hermetic dual-in-line ceramic packages (F3A suffix),14-lead dual-in-line plastic packages (E suffix), 14-lead small-outline packages (M, MT, M96, and NSR suffixes),and 14-lead thin shrink small-outline packages (PWR suffix). The CD4011B and CD4023BPWE4 types also are supplied in14-lead thin shrink small-outline packages (PW suffix).

Feature

  • Propagation delay time = 60 ns (typ.) at CL = 50 pF, VDD = 10 V
  • Buffered inputs and outputs
  • Standardized symmetrical output characteristics
  • Maximum input current of 1 μA at 18 V over-full package temperature range; 100 nA at 18 V and 25°C
  • 100% tested for quiescent current at 20 V
  • 5-V, 10-V, and 15-V parametric ratings
  • Noise margin (over full package temperature range:
        1 V at VDD = 5 V
        2 V at VDD = 10 V
        2.5 at VDD = 15 V
  • Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of "B" Series CMOS Devices"

Technical Parameters

Product NAND Maximum Operating Temperature + 125 C
Logic Family 4000 Mounting Style SMD/SMT
Number of Gates 3 Package / Case TSSOP-14
Number of Lines (Input / Output) 3 / 1 Packaging Tube
High Level Output Current - 4.2 mA Minimum Operating Temperature - 55 C
Low Level Output Current 4.2 mA Number of Input Lines 3
Propagation Delay Time 250 ns Number of Output Lines 1
Supply Voltage Max 18 V Factory Pack Quantity 90
Supply Voltage Min 3 V

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