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AMIC110BZCZA

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Sitara Processor: ARM Cortex-A8, 10+ Ethernet protocols

  • Manufacturer :
  • TI
  • Package/Case :
  • BGA-324
  • Product Categories :
  • Microcontrollers
  • RoHs Status:
  • Lead free/RoHS Compliant
  • Marking Code:
  • AMIC110BZCZA
  • In-stock:
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AMIC110BZCZA Product Details

The AMIC110BZCZA device is a multiprotocol programmable industrialcommunications processor providing ready-to-use solutions for most industrial Ethernet and fieldbuscommunications slaves, as well as some masters. The device is based on the ARM Cortex-A8 processor,peripherals, and industrial interface options. The devices support high-level operating systems(HLOS). Processor SDK Linux andTI-RTOS are available free of charge from TI. Other RTOS are also offered by TI ecosystem partners.The AMIC110BZCZA microprocessor is an ideal companion communications chip to the C2000 family ofmicrocontrollers for connected drives.

The AMIC110BZCZA microprocessor contains the subsystems shown in Figure 1-1 and a brief description of each follows:

The microprocessor unit (MPU) subsystem is based on the ARM Cortex-A8processor. The PRU-ICSS is separate from the ARM core, allowing independent operation and clockingfor greater efficiency and flexibility. The PRU-ICSS enables additional peripheral interfaces andreal-time protocols such as EtherCAT, PROFINET IRT, EtherNet/IP, PROFIBUS, Ethernet Powerlink,Sercos III, and others. Additionally, the programmable nature of the PRU-ICSS, along with itsaccess to pins, events and all system-on-chip (SoC) resources, provides flexibility in implementingfast, real-time responses, specialized data handling operations, custom peripheral interfaces, andin offloading tasks from the other processor cores of SoC.

AMIC110BZCZA

Feature

  • Up to 300-MHz Sitara ARM Cortex-A8 32Bit RISC Processor
    • NEONSIMD Coprocessor
    • 32KB of L1 Instruction and 32KB of Data Cache WithSingle-Error Detection (Parity)
    • 256KB of L2 Cache With Error Correcting Code(ECC)
    • 176KB of On-Chip Boot ROM
    • 64KB of DedicatedRAM
    • Emulation and Debug - JTAG
    • Interrupt Controller (up to128 Interrupt Requests)
  • On-Chip Memory (Shared L3 RAM)
    • 64KB of General-Purpose On-Chip Memory Controller (OCMC) RAM
    • Accessible to All Masters
    • Supports Retention for Fast Wakeup
  • External Memory Interfaces (EMIF)
    • mDDR(LPDDR), DDR2, DDR3, DDR3LController:
      • mDDR: 200-MHz Clock (400-MHzData Rate)
      • DDR2: 266-MHz Clock (532-MHz DataRate)
      • DDR3: 400-MHz Clock (800-MHz DataRate)
      • DDR3L: 400-MHz Clock (800-MHz Data Rate)
      • 16-Bit Data Bus
      • 1GB of Total Addressable Space
      • Supports One x16 or Two x8 Memory Device Configurations
    • General-Purpose Memory Controller(GPMC)
      • Flexible 8-Bit and 16-Bit Asynchronous Memory Interface With up to SevenChip Selects (NAND, NOR, Muxed-NOR, SRAM)
      • Uses BCH Code to Support 4-, 8-, or 16-Bit ECC
      • UsesHamming Code to Support 1-Bit ECC
    • Error Locator Module (ELM)
      • Used in Conjunction With the GPMC to Locate Addresses of Data Errors fromSyndrome Polynomials Generated Using a BCH Algorithm
      • Supports 4-, 8-, and16-Bit per 512-Byte Block Error Location Based on BCH Algorithms
  • Programmable Real-Time Unit Subsystem and Industrial Communication Subsystem (PRU-ICSS)
    • Supports Protocols such asEtherCAT, PROFIBUS,PROFINET, EtherNet/IP, and More
    • Two Programmable Real-Time Units(PRUs)
      • 32-Bit Load/Store RISC Processor Capable of Running at 200 MHz
      • 8KB of Instruction RAM With Single-Error Detection (Parity)
      • 8KB of Data RAM With Single-Error Detection(Parity)
      • Single-Cycle 32-Bit Multiplier With 64-BitAccumulator
      • Enhanced GPIO Module Provides Shift-In/Out Support and ParallelLatch on External Signal
    • 12KB of Shared RAM WithSingle-Error Detection (Parity)
    • Three 120-Byte Register Banks Accessible byEach PRU
    • Interrupt Controller (INTC) for Handling System InputEvents
    • Local Interconnect Bus for Connecting Internal and External Masters tothe Resources Inside the PRU-ICSS
    • Peripherals Inside thePRU-ICSS:
      • One UART Port With Flow Control Pins, Supports up to 12Mbps
      • One Enhanced Capture (eCAP) Module
      • Two MII EthernetPorts that Support Industrial Ethernet, such as EtherCAT
      • One MDIO Port
  • Power, Reset, and Clock Management (PRCM) Module
    • Controls the Entry and Exit of Stand-By and Deep-SleepModes
    • Responsible for Sleep Sequencing, Power Domain Switch-Off Sequencing,Wake-Up Sequencing, and Power Domain Switch-On Sequencing
    • Clocks
      • Integrated 15- to 35-MHz High-Frequency Oscillator Used to Generate aReference Clock for Various System and Peripheral Clocks
      • Supports Individual Clock Enable and Disable Control for Subsystems andPeripherals to Facilitate Reduced Power Consumption
      • Five ADPLLs to Generate System Clocks (MPU Subsystem, DDR Interface, USBand Peripherals [MMC and SD, UART, SPI, I2C], L3, L4, Ethernet, GFX [SGX530], LCD Pixel Clock (1))
    • Power
      • Two Nonswitchable Power Domains (Real-Time Clock [RTC], Wake-Up Logic[WAKEUP])
      • Three Switchable Power Domains (MPUSubsystem [MPU], SGX530 [GFX](1), Peripherals andInfrastructure [PER])
      • Implements SmartReflex Class 2B for CoreVoltage Scaling Based On Die Temperature, Process Variation, and Performance (Adaptive VoltageScaling [AVS])
      • Dynamic Voltage Frequency Scaling(DVFS)
  • Real-Time Clock (RTC)
    • Real-Time Date (Day-Month-Year-Day of Week) and Time (Hours-Minutes-Seconds)Information
    • Internal 32.768-kHz Oscillator, RTC Logic and 1.1-V Internal LDO
    • Independent Power-on-Reset (RTC_PWRONRSTn) Input
    • Dedicated Input Pin (EXT_WAKEUP) for External Wake Events
    • Programmable Alarm Can be Used to Generate Internal Interrupts to the PRCM(for Wakeup) or Cortex-A8 (for Event Notification)
    • Programmable Alarm Can be Used With External Output (PMIC_POWER_EN) to Enablethe Power Management IC to Restore Non-RTC Power Domains
  • Peripherals
    • Up to Two USB 2.0 High-Speed DRD (Dual-Role Device) Ports With IntegratedPHY
    • Up to Two Industrial GigabitEthernet MACs (10, 100, 1000 Mbps)
      • Integrated Switch
      • Each MAC Supports MII, RMII, RGMII, and MDIOInterfaces
      • Ethernet MACs and Switch Can Operate Independent of OtherFunctions
      • IEEE 1588v2 Precision Time Protocol (PTP)
    • Up to Two Controller-Area Network (CAN) Ports
      • Supports CAN Version 2 Parts A and B
    • Up to Two Multichannel AudioSerial Ports (McASPs)
      • Transmit and Receive Clocks up to 50 MHz
      • Up to Four Serial Data Pins per McASP Port With Independent TX and RXClocks
      • Supports Time Division Multiplexing (TDM), Inter-ICSound (I2S), and Similar Formats
      • Supports Digital Audio Interface Transmission (SPDIF, IEC60958-1, andAES-3 Formats)
      • FIFO Buffers for Transmit and Receive (256 Bytes)
    • Up to SixUARTs
      • All UARTs Support IrDA and CIR Modes
      • All UARTsSupport RTS and CTS Flow Control
      • UART1 Supports Full Modem Control
    • Up to Two Master and Slave McSPI SerialInterfaces
      • Up to Two Chip Selects
      • Up to 48MHz
    • Up to Three MMC, SD, SDIOPorts
      • 1-, 4- and 8-Bit MMC, SD, SDIO Modes
      • MMCSD0 has Dedicated Power Rail for 1.8V or 3.3-V Operation
      • Up to 48-MHz Data Transfer Rate
      • Supports Card Detect and Write Protect
      • Complies With MMC4.3, SD, SDIO 2.0 Specifications
    • Up to Three I2CMaster and Slave Interfaces
      • Standard Mode (up to 100 kHz)
      • Fast Mode (up to 400kHz)
    • Up to Four Banks of General-Purpose I/O (GPIO)Pins
      • 32 GPIO Pins per Bank (Multiplexed With Other FunctionalPins)
      • GPIO Pins Can be Used as Interrupt Inputs (up to Two Interrupt Inputs perBank)
    • Up to Three External DMA Event Inputs that canAlso be Used as Interrupt Inputs
    • Eight 32-Bit General-Purpose Timers
      • DMTIMER1 is a 1-ms Timer Used for Operating System (OS)Ticks
      • DMTIMER4–DMTIMER7 are PinnedOut
    • One Watchdog Timer
    • 12-Bit SuccessiveApproximation Register (SAR) ADC
      • 200K Samples per Second
      • Input can be Selected from any of the Eight Analog InputsMultiplexed Through an 8:1 Analog Switch
    • Up to Three EnhancedHigh-Resolution PWM Modules (eHRPWMs)
      • Dedicated 16-Bit Time-Base CounterWith Time and Frequency Controls
      • Configurable as SixSingle-Ended, Six Dual-Edge Symmetric, or Three Dual-Edge AsymmetricOutputs
  • Device Identification
    • Contains Electrical Fuse Farm (FuseFarm) of Which Some Bits are FactoryProgrammable
      • Production ID
      • Device Part Number (Unique JTAG ID)
      • Device Revision (Readable by Host ARM)
  • Debug Interface Support
    • JTAG and cJTAG for ARM (Cortex-A8 and PRCM), PRU-ICSS Debug
    • Supports Device Boundary Scan
    • Supports IEEE 1500
  • DMA
    • On-Chip Enhanced DMA Controller (EDMA) has Three Third-Party TransferControllers (TPTCs) and One Third-Party Channel Controller (TPCC), Which Supports up to 64Programmable Logical Channels and Eight QDMA Channels. EDMA is Used for:
      • Transfers to and from On-Chip Memories
      • Transfers to and from External Storage (EMIF, GPMC, SlavePeripherals)
  • Inter-Processor Communication (IPC)
    • Integrates Hardware-Based Mailbox for IPC and Spinlock for ProcessSynchronization Between Cortex-A8, PRCM, and PRU-ICSS
      • Mailbox Registers that Generate Interrupts
        • Four Initiators (Cortex-A8, PRCM, PRU0, PRU1)
      • Spinlock has 128 Software-Assigned Lock Registers
  • Security
    • Secure Boot
  • Boot Modes
    • Boot Mode is Selected Through Boot Configuration Pins Latched on the RisingEdge of the PWRONRSTn Reset Input Pin
  • Package:
    • 324-Pin S-PBGA-N324 Package
      (ZCZ Suffix), 0.80-mm Ball Pitch

AMIC110BZCZA Block Diagram
(Picture: Diagram)

Technical Parameters

  • Core Processor
  • ARM? Cortex?-A8
  • Number of Cores/Bus Width
  • 1 Core, 32-Bit
  • Speed
  • 300MHz
  • Co Processors/DSP
  • Multimedia; NEON? SIMD
  • RAM Controllers
  • LPDDR, DDR2, DDR3, DDR3L
  • Graphics Acceleration
  • No
  • USB
  • USB 2.0 + PHY (2)
  • Voltage I/O
  • 1.8V, 3.3V
  • Operating Temperature
  • -40??C ~ 105??C (TJ)
  • Package / Case
  • 324-LFBGA
  • Supplier Device Package
  • 324-NFBGA(15x15)

AMIC110BZCZA Documents

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Guarantees

1.We provide 90 days warranty.

2.If some of the items you received aren't of perfect quality, we would resiponsibly arrange your refund or replacement. But the items must remain their orginal condition.

FAQ:

Q: How does Jotrin guarantee that AMIC110BZCZA is the original manufacturer or agent of TI?
We have a professional business development department to strictly test and verify the qualifications of TI original manufacturers and agents. All TI suppliers must pass the qualification review before they can publish their AMIC110BZCZA devices; we pay more attention to the channels and quality of AMIC110BZCZA products than any other customer. We strictly implement supplier audits, so you can purchase with confidence.
Q: How to find the detailed information of AMIC110BZCZA chips? Including TI original factory information, Microcontrollers application, AMIC110BZCZA pictures?
You can use Jotrin's intelligent search engine, or filter by DLP products ; Advanced light control ; High speed visible category, or find it through TI brand manufacturer page.
Q: Are the TI's AMIC110BZCZA price and stock displayed on the platform accurate?
The TI's inventory fluctuates greatly and cannot be updated in time, it will be updated periodically within 24 hours. After submitting an order for AMIC110BZCZA, it is recommended to confirm the order with Jotrin salesperson or online customer service before payment.
Q: Can I place an order offline?
Yes. We accept offline orders.
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Note: It may take up to 24 hours before carriers will display tracking information. In normal conditions, Express delivery needs 3-5 days, Registered Mail needs 25-60 days.
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All goods will implement Pre-Shipment Inspection (PSI), selected at random from all batches of your order to do a systematic inspection before arranging the shipment. If there is something wrong with the AMIC110BZCZA we delivered, we will accept the replacement or return of the AMIC110BZCZA only when all of the below conditions are fulfilled:
(1)Such as a deficiency in quantity, delivery of wrong items, and apparent external defects (breakage and rust, etc.), and we acknowledge such problems.
(2)We are informed of the defect described above within 90 days after the delivery of AMIC110BZCZA.
(3)The AMIC110BZCZA is unused and only in the original unpacked packaging.
Two processes to return the products:
(1)Inform us within 90 days
(2)Obtain Requesting Return Authorizations
More details about return electronic components please see our Return & Change Policy.
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