Products > Integrated Circuits (ICs) > ADRF6655ACPZ

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Broadband Up/Downconverting Mixer with Integrated Fractional-N PLL and VCO

Manufacturer : Analog Devices, Inc
Package/Case : QFN40
Product Categories : RF Integrated Transmitters, Receivers, & Transceivers ; RF Mixers with Integrated LO
Datasheet: ADRF6655ACPZ Datasheet (PDF)
RoHs Status: Lead free/RoHS Compliant
In-stock: 83


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ADRF6655ACPZ Product Details

The ADRF6655ACPZ is a high dynamic range active mixer with integrated PLL and VCO. The synthesizer uses a programmable integer-N/fractional-N PLL to generate a local oscillator input to the mixer. The PLL reference input is nominally 20 MHz. The reference input can be divided by or multiplied by and then applied to the PLL phase detector. The PLL can support input reference frequencies from 10 MHz to 160 MHz. The phase detector output controls a charge pump whose output is integrated in an off-chip loop filter. The loop filter output is then applied to an integrated VCO. The VCO output at 2 × fLO is then applied to a local oscillator (LO) divider as well as to a programmable PLL divider.

The programmable divider is controlled by an Σ-Δ modulator (SDM). The modulus of the SDM can be programmed between 1 and 2047.

The broadband, active mixer employs a bias adjustment to allow for enhanced IP3 performance at the expense of increased supply current. The mixer provides an input IP3 exceeding 25 dBm with 12 dB single sideband NF under typical conditions. The IIP3 can be boosted to ~29 dBm with roughly 20 mA of additional supplied current. The mixer provides a typical voltage conversion gain of 6 dB with a 200 Ω differential IF output impedance. The IF output can be externally matched to support upconversion over a limited frequency range.

The ADRF6655ACPZ is fabricated using an advanced silicon-germanium BiCMOS process. It is packaged in a 40-lead, exposed-paddle, Pb-free, 6 mm × 6 mm LFCSP. Performance is specified over a −40°C to +85°C temperature range.


  • Broadband active mixer with integrated fractional-N PLL
  • RF input frequency range: 100 MHz to 2500 MHz
  • Internal LO frequency range: 1050 MHz to 2300 MHz
  • Flexible IF output interface
  • Input P1dB: 12 dBm
  • Input IP3: 29 dBm
  • Noise figure (SSB): 12 dB
  • Voltage conversion gain: 6 dB
  • Matched 200 Ω output impedance
  • SPI serial interface for PLL programming
  • 40-lead 6 mm × 6 mm LFCSP

ADRF6655ACPZ Pinout
(Picture: Pinout)

ADRF6655ACPZ Block Diagram
(Picture: Diagram)

Technical Parameters

  • Freq Response RFmin | Hz
  • 100M
  • Freq Response RFmax | Hz
  • 2.5G
  • Freq Response LOmin | Hz
  • 1.05G
  • Freq Response LOmax | Hz
  • 2.3G
  • Freq Response IFmin | Hz
  • 10M
  • Freq Response IFmax | Hz
  • 2.2G
  • Conversion GaindB
  • 0
  • Phase Noise @ 10kdBc/Hz
  • -83
  • Phase Noise @ 1MdBc/Hz
  • -136
  • IIP3typ | dBm
  • 29
  • NFtyp | dB
  • 12

ADRF6655ACPZ Datasheet

  • ADRF6655 Technical Documentation/Data sheet

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Analog Devices, Inc

Analog Devices, Inc. was founded by two MIT graduates, Ray Stata and Matthew Lorber in 1965. The same year, the company released its first product, the model 101 op amp, which was a hockey-puck sized module used in test and measurement equipment. In 1967, the company published the first issue of its...

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