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ADAU1961 32-Lead LFCSP (5mm x 5mm w/ EP)
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ADAU1961

Automotive Stereo, Low Power, 96 KHz, 24-Bit Audio Codec With Integrated PLL

Manufacturer :
Analog Devices, Inc
Package/Case :
32-Lead LFCSP (5mm x 5mm w/ EP)
Product Categories :
Multimedia , Audio , Codecs
Datasheet:
ADAU1961 PDF
RoHs Status:
Lead free / RoHS Compliant
In-stock:
2118

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ADAU1961 Product Details

Automotive Stereo, Low Power, 96 KHz, 24-Bit Audio Codec With Integrated PLL The ADAU1961 is a low power, stereo audio codec that supports stereo 48 kHz record and playback at 35 mW from a 3.3 V analog supply. The stereo audio ADCs and DACs support sample rates from 8 kHz to 96 kHz as well as a digital volume control. The record path includes an integrated microphone bias circuit and six inputs. The inputs can be mixed and muxed before the ADC, or they can be

Stereo, Low Power, 96 kHz, 24-Bit Audio Codec with Integrated PLL ADAU1961
FEATURES

24-bit stereo audio ADC and DAC: >98 dB SNR Sampling rates from 8 kHz to 96 kHz Low power: 17 mW record, 18 mW playback, 48 kHz 6 analog input pins, configurable for single-ended or differential inputs Flexible analog input/output mixers Stereo digital microphone input Analog outputs: 2 differential stereo, 2 single-ended stereo, 1 mono headphone output driver PLL supporting input clocks from 8 MHz to 27 MHz Analog automatic level control (ALC) Microphone bias reference voltage Analog and digital I/O: V I2C and SPI control interfaces Digital audio serial data I/O: stereo and time-division multiplexing (TDM) modes Software-controllable clickless mute 5 mm LFCSP to +105�C operating temperature range Qualified for automotive applications

The is a low power, stereo audio codec that supports stereo 48 kHz record and playback 35 mW from 3.3 V analog supply. The stereo audio ADCs and DACs support sample rates from 8 kHz to 96 kHz as well as a digital volume control. The record path includes an integrated microphone bias circuit and six inputs. The inputs can be mixed and muxed before the ADC, or they can be configured to bypass the ADC. The ADAU1961 includes a stereo digital microphone input. The ADAU1961 includes five high power output drivers (two differential and three single-ended), supporting stereo headphones, an earpiece, or other output transducer. AC-coupled or capless configurations are supported. Individual fine level controls are supported on all analog outputs. The output mixer stage allows for flexible routing of audio. The serial control bus supports the I2C and SPI protocols. The serial audio bus is programmable for I2S, left-/right-justified, and TDM modes. A programmable PLL supports flexible clock generation for all standard integer rates and fractional master clocks from 8 MHz to 27 MHz.

APPLICATIONS
Automotive head units Automotive amplifiers Navigation systems Rear-seat entertainment systems
LAUX LINP ADC LINN RINP RINN RAUX INPUT MIXERS ALC ADC DAC ADC DIGITAL FILTERS DAC
LOUTP LOUTN LHP OUTPUT MIXERS MONOOUT RHP ROUTP ROUTN

Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 �2010 Analog Devices, Inc. All rights reserved.

DAC_SDATA ADDR0/ ADDR1/ SCL/ SDA/ CLATCH CDATA CCLK COUT

Features.............................................................................................. 1 Applications....................................................................................... 1 General Description......................................................................... 1 Functional Block Diagram.............................................................. 1 Revision History............................................................................... 2 Specifications..................................................................................... 3 Analog Performance Specifications, 25�C....................... 3 Analog Performance Specifications, +105�C... 5 Power Supply Specifications........................................................ 7 Digital Filters................................................................................. 8 Digital Input/Output Specifications........................................... 8 Digital Timing Specifications..................................................... 9 Digital Timing Diagrams........................................................... 10 Absolute Maximum Ratings.......................................................... 12 Thermal Resistance.................................................................... 12 ESD Caution................................................................................ 12 Pin Configuration and Function Descriptions........................... 13 Typical Performance Characteristics........................................... 15 System Block Diagrams................................................................. 18 Theory of Operation...................................................................... 21 Startup, Initialization, and Power................................................. 22 Power-Up Sequence................................................................... 22 Power Reduction Modes............................................................ 22 Digital Power Supply.................................................................. 22 Input/Output Power Supply...................................................... 22 Clock Generation and Management........................................ 22 Clocking and Sampling Rates....................................................... 24 Core Clock................................................................................... 24 Sampling Rates............................................................................ 24 PLL............................................................................................... 25 Record Signal Path......................................................................... 27 Input Signal Paths....................................................................... 27 Analog-to-Digital Converters................................................... 29 Automatic Level Control (ALC)................................................... 30 ALC Parameters.......................................................................... 30 Noise Gate Function.................................................................. 31 Playback Signal Path...................................................................... 33 Output Signal Paths................................................................... 33 Headphone Output.................................................................... 34 Pop-and-Click Suppression...................................................... 35 Line Outputs............................................................................... 35 Control Ports................................................................................... 36 Burst Mode Writing and Reading............................................ 36 I2C Port........................................................................................ 36 SPI Port........................................................................................ 39 Serial Data Input/Output Ports.................................................... 40 Applications Information.............................................................. 42 Power Supply Bypass Capacitors.............................................. 42 GSM Noise Filter........................................................................ 42 Grounding................................................................................... 42 Exposed Pad PCB Design......................................................... 42 Control Registers............................................................................ 43 Control Register Details............................................................ 44 Outline Dimensions....................................................................... 75 Ordering Guide.......................................................................... 75 Automotive Products................................................................. 75

Supply voltage (AVDD) = 25�C, master clock = 12.288 MHz (48 kHz fS, � fS mode), input sample rate = 48 kHz, measurement bandwidth to 20 kHz, word width = 24 bits, CLOAD (digital output) = 20 pF, ILOAD (digital output) = 2 mA, VIH 2 V, VIL 0.8 V, unless otherwise noted. Performance of all channels is identical, exclusive of the interchannel gain mismatch and interchannel phase deviation specifications.

Parameter ANALOG-TO-DIGITAL CONVERTERS ADC Resolution Digital Attenuation Step Digital Attenuation Range INPUT RESISTANCE Single-Ended Line Input Test Conditions/Comments ADC performance excludes mixers and PGA All ADCs Min Typ Max Unit

PGA Noninverting Inputs SINGLE-ENDED LINE INPUT Full-Scale Input Voltage (0 dB) Dynamic Range With A-Weighted Filter (RMS) No Filter (RMS) Total Harmonic Distortion + Noise Signal-to-Noise Ratio With A-Weighted Filter (RMS) No Filter (RMS) Input Mixer Gain per Step Mute Attenuation

-12 dB gain 0 dB gain 6 dB gain -12 dB gain 0 dB gain 35.25 dB gain All gains

Interchannel Gain Mismatch Offset Error Gain Error Interchannel Isolation Power Supply Rejection Ratio PSEUDO-DIFFERENTIAL PGA INPUT Full-Scale Input Voltage (0 dB) Dynamic Range With A-Weighted Filter (RMS) No Filter (RMS) Total Harmonic Distortion + Noise Signal-to-Noise Ratio With A-Weighted Filter (RMS) No Filter (RMS) PGA Boost Gain Error


Feature

  • 24-bit stereo audio ADC and DAC: >98 dB SNR
  • Sampling rates from 8 kHz to 96 kHz
  • Low power: 17 mW record, 18 mW playback, 48 kHz
  • 6 analog input pins, configurable for single-ended or differential inputs
  • Flexible analog input/output mixers
  • Stereo digital microphone input
  • Analog outputs: 2 differential stereo, 2 single-ended stereo, 1 mono headphone output driver
  • PLL supporting input clocks from 8 MHz to 27 MHz
  • Analog automatic level control (ALC)
  • Microphone bias reference voltage
  • Analog and digital I/O: 3.3 V
  • I2C and SPI control interfaces
  • Digital audio serial data I/O: stereo and time-division multiplexing (TDM) modes
  • Software-controllable clickless mute
  • 32-lead, 5 mm × 5 mm LFCSP
  • −40°C to +105°C operating temperature

Applications

  • Automotive head units
  • Automotive amplifiers
  • Navigation systems
  • Rear-seat entertainment systems

ADAU1961 Block Diagram
(Picture: Diagram)

Technical Parameters

Channels 2 DAC Outputs 2
Resolutionbits 24 DAC THD+Ntyp | dBc -90
ADC THD+Ntyp | dB -90 DAC DNRtyp | dB 101
ADC Sample Ratemax | SPS 96k Data Output Interface Serial I2C

ADAU1961 Documents

  • ADAU1961 Technical Documentation/Data sheet

ADAU1961 Related Products

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Analog Devices, Inc. was founded by two MIT graduates, Ray Stata and Matthew Lorber in 1965. The same year, the company released its first product, the model 101 op amp, which was a hockey-puck sized...
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