Products > Integrated Circuits (ICs) > Clock & Timer ICs > AD9528BCPZ-REEL7

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PLL Clock Generator Dual 3450MHz to 4025MHz 72Pin LFCSP T/R

  • Package/Case :
  • LFCSP72
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  • IC Chips
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  • Green
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  • 1568


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AD9528BCPZ-REEL7 Product Details

The AD9528BCPZ-REEL7 is a two-stage PLL with an integrated JESD204BSYSREF generator for multiple device synchronization. The firststage phase-locked loop (PLL) (PLL1) provides input referenceconditioning by reducing the jitter present on a system clock.The second stage PLL (PLL2) provides high frequency clocksthat achieve low integrated jitter as well as low broadband noisefrom the clock output drivers. The external VCXO provides thelow noise reference required by PLL2 to achieve the restrictivephase noise and jitter requirements necessary to achieve acceptableperformance. The on-chip VCO tunes from 3.450 GHz to4.025 GHz. The integrated SYSREF generator outputs singleshot, N-shot, or continuous signals synchronous to the PLL1and PLL2 outputs to time align multiple devices.

The AD9528BCPZ-REEL7 generates six outputs (Output 0 to Output 3,Output 12, and Output 13) with a maximum frequency of1.25 GHz, and eight outputs with a maximum frequency of upto 1 GHz. Each output can be configured to output directlyfrom PLL1, PLL2, or the internal SYSREF generator. Each of the14 output channels contains a divider with coarse digital phaseadjustment and an analog fine phase delay block that allowscomplete flexibility in timing alignment across all 14 outputs.The AD9528BCPZ-REEL7 can also be used as a dual input flexible buffer todistribute 14 device clock and/or SYSREF signals. At power-up,the AD9528BCPZ-REEL7 sends the VCXO signal directly to Output 12 andOutput 13 to serve as the power-up ready clocks.


  • 14 outputs configurable for HSTL or LVDS
  • Maximum output frequency
    • 6 outputs up to 1.25 GHz
    • 8 outputs up to 1 GHz
  • Dependent on the voltage controlled crystal oscillator
    • (VCXO) frequency accuracy (start-up frequency accuracy: <±100 ppm)
  • Dedicated 8-bit dividers on each output
    • Coarse delay: 63 steps at 1/2 the period of the RF VCO divider output frequency with no jitter impact
    • Fine delay: 15 steps of 31 ps resolution
  • Typical output to output skew: 20 ps
  • Duty cycle correction for odd divider settings
  • Output 12 and Output 13, VCXO output at power-up
  • Absolute output jitter: <160 fs at 122.88 MHz, 12 kHz to 20 MHz integration range
  • Digital frequency lock detect
  • SPI- and I2C-compatible serial control port
  • Dual PLL architecture
    • PLL1
      • Provides reference input clock cleanup with external VCXO
      • Phase detector rate up to 110 MHz
      • Redundant reference inputs
      • Automatic and manual reference switchover modesRevertive and nonrevertive switching
      • Loss of reference detection with holdover mode
      • Low noise LVDS/HSTL outputs from VCXO used for radio frequency/intermediate frequency (RF/IF) synthesizers
    • PLL2
      • Phase detector rate of up to 275 MHz
      • Integrated low noise VCO


  • High performance wireless transceivers
  • LTE and multicarrier GSM base stations
  • Wireless and broadband infrastructure
  • Medical instrumentation
  • Clocking high speed ADCs, DACs, DDSs, DDCs, DUCs, MxFEs; supports JESD204B
  • Low jitter, low phase noise clock distribution
  • ATE and high performance instrumentation

AD9528BCPZ-REEL7 Pinout
(Picture: Pinout)

AD9528BCPZ-REEL7 Block Diagram
(Picture: Diagram)

Technical Parameters

  • Family
  • Clock/Timing - Clock Generators, PLLs, Frequency Synthesizers
  • Series
  • -
  • Packaging  
  • Cut Tape (CT)&nbsp;&nbsp;
  • Type
  • *
  • PLL
  • Yes with Bypass
  • Input
  • Output
  • Number of Circuits
  • 1
  • Ratio Input Output
  • 2 14
  • Differential Input Output
  • Yes/Yes
  • Frequency Max
  • 1.25GHz
  • Divider/Multiplier
  • Yes/No
  • Voltage Supply
  • 3.135 V ~ 3.465 V
  • Operating Temperature
  • -40�C ~ 85�C
  • Mounting Type
  • Surface Mount
  • Package / Case
  • 72-VFQFN Exposed Pad, CSP
  • Supplier Device Package
  • 72-LFCSP-VQ (10x10)
  • Online Catalog
  • Clock Generators

AD9528BCPZ-REEL7 Documents

  • AD9528 Technical Documentation/Data sheet

AD9528BCPZ-REEL7 Related Products

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  • **rnst***

    angenehme Transaktion, vielen Dank

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Analog Devices, Inc

Analog Devices, Inc. was founded by two MIT graduates, Ray Stata and Matthew Lorber in 1965. The same year, the company released its first product, the model 101 op amp, which was a hockey-puck sized module used in test and measurement equipment. In 1967, the company published the first issue of its...
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