TQFP-144
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- Description
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- Quantity
- Operation
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CPLD MAX V Family 440 Macro Cells 118.3MHz 1.8V 144-Pin TQFP
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1 + 10 + 25 + 50 + >=100 -
Minimum : 1 In-stock : 26
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CPLD XC9500 Family 6.4K Gates 288 Macro Cells 100MHz 0.35um Technology 3.3V 144-Pin TQFP
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1 + 10 + 25 + 50 + >=100 -
Minimum : 1 In-stock : 146
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FPGA Virtex Family 108.904K Gates 2700 Cells 250MHz 0.22um Technology 2.5V 144-Pin TQFP
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1 + 10 + 25 + 50 + >=100 -
Minimum : 1 In-stock : 78
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FPGA Virtex Family 57.906K Gates 1728 Cells 250MHz 0.22um Technology 2.5V 144-Pin TQFP
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1 + 10 + 25 + 50 + >=100 -
Minimum : 1 In-stock : 69
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FPGA Virtex Family 108.904K Gates 2700 Cells 333MHz 0.22um Technology 2.5V 144-Pin TQFP
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1 + 10 + 25 + 50 + >=100 -
Minimum : 1 In-stock : 179
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FPGA Spartan-II Family 100K Gates 2700 Cells 263MHz 0.18um Technology 2.5V 144-Pin TQFP
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1 + 10 + 25 + 50 + >=100 -
Minimum : 1 In-stock : 289
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CPLD CoolRunner -II Family 6K Gates 256 Macro Cells 152MHz 0.18um Technology 1.8V 144-Pin TQFP
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1 + 10 + 25 + 50 + >=100 -
1
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FPGA QuickRAM Family 61.82K Gates 320 Cells 416.67MHz 0.35um Technology 3.3V 144-Pin TQFP
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1 + 10 + 25 + 50 + >=100 -
1
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CPLD CoolRunner -II Family 9K Gates 384 Macro Cells 125MHz 0.18um Technology 1.8V 144-Pin TQFP
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1 + 10 + 25 + 50 + >=100 -
Minimum : 1 In-stock : 294
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FPGA pASIC 3 Family 32.616K Gates 672 Cells 416.67MHz 0.35um Technology 3.3V 144-Pin TQFP
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1 + 10 + 25 + 50 + >=100 -
Minimum : 1 In-stock : 293
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FPGA pASIC 3 Family 32.616K Gates 672 Cells 416.67MHz 0.35um Technology 3.3V 144-Pin TQFP
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1 + 10 + 25 + 50 + >=100 -
Minimum : 1 In-stock : 266
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FPGA XC4000E Family 5K Gates 466 Cells 0.35um Technology 5V 144-Pin TQFP
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1 + 10 + 25 + 50 + >=100 -
Minimum : 1 In-stock : 291
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FPGA Spartan-3A Family 50K Gates 1584 Cells 667MHz 90nm Technology 1.2V 144-Pin TQFP
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1 + 10 + 25 + 50 + >=100 -
Minimum : 1 In-stock : 135
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FPGA Spartan-II Family 50K Gates 1728 Cells 263MHz 0.18um Technology 2.5V 144-Pin TQFP
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1 + 10 + 25 + 50 + >=100 -
Minimum : 1 In-stock : 79
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FPGA Spartan-II Family 15K Gates 432 Cells 263MHz 0.18um Technology 2.5V 144-Pin TQFP EP
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1 + 10 + 25 + 50 + >=100 -
Minimum : 1 In-stock : 288
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CPLD CoolRunner -II Family 6K Gates 256 Macro Cells 152MHz 0.18um Technology 1.8V 144-Pin TQFP
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1 + 10 + 25 + 50 + >=100 -
Minimum : 1 In-stock : 199
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CPLD MachXO Family 320 Macro Cells 1.8V/2.5V/3.3V 144-Pin TQFP Tray
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1 + 10 + 25 + 50 + >=100 -
Minimum : 1 In-stock : 223
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FPGA Eclipse II Family 63.84K Gates 256 Cells 0.18um Technology 1.8V 144-Pin TQFP
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1 + 10 + 25 + 50 + >=100 -
1
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FPGA Eclipse II Family 63.84K Gates 256 Cells 0.18um Technology 1.8V 144-Pin TQFP
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1 + 10 + 25 + 50 + >=100 -
1
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FPGA APEX 20K Family 160K Gates 6400 Cells 350MHz 0.22um Technology 1.8V 144-Pin TQFP
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1 + 10 + 25 + 50 + >=100 -
Minimum : 1 In-stock : 227
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FPGA SX-A Family 32K Gates 1800 Cells 238MHz 0.25um Technology 2.5V 144-Pin TQFP
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1 + 10 + 25 + 50 + >=100 -
Minimum : 1 In-stock : 119
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CPLD MAX V Family 192 Macro Cells 184.1MHz 1.8V 144-Pin TQFP
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1 + 10 + 25 + 50 + >=100 -
Minimum : 1 In-stock : 66
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FPGA IGLOO?2 Family 12084 Cells 1.2V 144-Pin TQFP Tray
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1 + 10 + 25 + 50 + >=100 -
Minimum : 1 In-stock : 219
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FPGA IGLOO?2 Family 12084 Cells 1.2V 144-Pin TQFP Tray
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1 + 10 + 25 + 50 + >=100 -
Minimum : 1 In-stock : 484
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FPGA IGLOO?2 Family 12084 Cells 1.2V 144-Pin TQFP Tray
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1 + 10 + 25 + 50 + >=100 -
Minimum : 1 In-stock : 316
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FPGA IGLOO?2 Family 12084 Cells 1.2V 144-Pin TQFP Tray
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1 + 10 + 25 + 50 + >=100 -
Minimum : 1 In-stock : 794
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FPGA IGLOO®2 Family 6060 Cells 1.2V 144-Pin TQFP Tray
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1 + 10 + 25 + 50 + >=100 -
Minimum : 1 In-stock : 20
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FPGA LatticeXP Family 6000 Cells 360MHz 130nm Technology 1.8V/2.5V/3.3V 144-Pin TQFP Tray
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1 + 10 + 25 + 50 + >=100 -
Minimum : 1 In-stock : 29
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FPGA LatticeXP Family 6000 Cells 320MHz 130nm Technology 1.8V/2.5V/3.3V 144-Pin TQFP Tray
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1 + 10 + 25 + 50 + >=100 -
Minimum : 1 In-stock : 1108
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FPGA LatticeXP Family 3000 Cells 320MHz 130nm Technology 1.2V 144-Pin TQFP Tray
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1 + 10 + 25 + 50 + >=100 -
Minimum : 1 In-stock : 1777
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FPGA LatticeXP Family 3000 Cells 320MHz 130nm Technology 1.8V/2.5V/3.3V 144-Pin TQFP Tray
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1 + 10 + 25 + 50 + >=100 -
Minimum : 1 In-stock : 1500
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FPGA SmartFusion Family 60K Gates 100MHz 130nm Technology 1.5V 144-Pin TQFP
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1 + 10 + 25 + 50 + >=100 -
Minimum : 1 In-stock : 699
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Field Programmable Gate Array, 768 CLBs, 12000Gates, 313MHz, 768-Cell, CMOS, PQFP144, 1.4MM HEIGHT, ROHS COMPLIANT, TQFP-144
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1 + 10 + 25 + 50 + >=100 -
Minimum : 1 In-stock : 854
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Field Programmable Gate Array, 1452 CLBs, 24000Gates, 263MHz, 1452-Cell, CMOS, PQFP144, 1.4MM HEIGHT, ROHS COMPLIANT, TQFP-144
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1 + 10 + 25 + 50 + >=100 -
Minimum : 1 In-stock : 400
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Field Programmable Gate Array, 1452 CLBs, 24000Gates, 294MHz, 1452-Cell, CMOS, PQFP144, 1.4MM HEIGHT, ROHS COMPLIANT, TQFP-144
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1 + 10 + 25 + 50 + >=100 -
Minimum : 1 In-stock : 184
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Field Programmable Gate Array, 2880 CLBs, 48000Gates, 172MHz, 2880-Cell, CMOS, PQFP144, 1.4MM HEIGHT, ROHS COMPLIANT, TQFP-144
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1 + 10 + 25 + 50 + >=100 -
Minimum : 1 In-stock : 638
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Field Programmable Gate Array, 1452 CLBs, 24000Gates, 294MHz, 1452-Cell, CMOS, PQFP144, 1.4MM HEIGHT, ROHS COMPLIANT, TQFP-144
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1 + 10 + 25 + 50 + >=100 -
Minimum : 1 In-stock : 490
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Field Programmable Gate Array, 1452 CLBs, 24000Gates, 167MHz, 1452-Cell, CMOS, PQFP144, 1.4MM HEIGHT, ROHS COMPLIANT, TQFP-144
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1 + 10 + 25 + 50 + >=100 -
Minimum : 1 In-stock : 909
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Q:What defines the physical structure of TQFP-144?
A:Key features include:
- Gull-wing leads: Surface-mountable with outward-bent pins for robust PCB attachment.
- Central thermal pad: Enhances heat dissipation (typically 60–80% coverage of the package base).
- 144-pin layout: High-density pinout with quadruple-row peripheral arrangement.
- Low profile: Standard thickness of 1.0–1.4 mm for space-constrained designs. -
Q:Why choose TQFP-144 over alternatives?
A:Critical advantages:
- Miniaturization: 30% smaller footprint than QFP-128 with higher pin density.
- Thermal Performance: Exposed die pad enables direct PCB heat sinking (5°C/W typical thermal resistance).
- Electrical Benefits: Short lead frames reduce inductance (<1 nH) for high-speed signals.
- Reliability: Moisture-resistant FR-4 or polyimide substrates (JEDEC Level 3 compliant). -
Q:What are common technical specs?
A:Standard configurations (consult datasheets):
- Body Size: 20×20 mm (±0.2 mm tolerance).
- Height: 1.4 mm (max).
- Pin Pitch: 0.5 mm (fine-pitch design).
- Material: Copper-alloy leads with matte-tin plating.
- Temp Range: -40°C to +125°C (industrial grade). -
Q:Where is TQFP-144 typically applied?
A:Dominant use cases:
- Embedded Systems: Microcontrollers (e.g., STM32F4xx series).
- Communications: Ethernet PHY chips (e.g., DP83848).
- Automotive: ECU interfaces (e.g., TMS570 processors). -
Q:What are critical assembly guidelines?
A:Key recommendations:
- PCB Design: Use 4×4 thermal via arrays under the pad (0.3 mm diameter recommended).
- Solder Paste: Type 4 (fine powder) for reliable 0.5 mm pitch soldering.
- Reflow Profile: Peak temperature ≤245°C (Pb-free) with 60–90 sec above 217°C.
- Inspection: Automated X-ray (AXI) required to verify hidden solder joints.



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