Microchip PIC18F47Q10 PIC MIC low power application development program

Pic18f27/47q10 microcontrollers feature analog, core independentAnd the communication peripherals fora wide range of general purpose and low power applications. These 44-28/40 / pin devices are equippedwith a 10 - bit ADC with Computation (ADC2) automating CapacitiveVoltage Divider (CVD) techniques foradvanced touch sensing, averaging, filtering,Oversampling and performing automatic thresholdcomparisons. Braking offers a set of core independent peripherals to the as Complementary WaveformGenerator (CWG), Windowed Watchdog Timer (WWDT),Cyclic Redundancy Check (CRC)/MemoryScan, Zero - Cross Detect (ZCD), Configurable Logic Cell (CLC), and Peripheral Pin Select (PPS), providing increased the design flexibility and lower the system cost.

Main features:

Nuclear features:

• C Compiler Optimized RISC Architecture

• Operating Speed:

-- DC -- 64 MHz clock input over the full VDD range

-- 62.5 ns minimum instruction cycle

• Programmable 2-level Interrupt Priority

• 31-level Deep Hardware Stack

• three-8-bit tick (tmr2/4/6) with Hardware Limit Timer (HLT)

• four-16-bit tick (tmr0/1/3/5)

• low-current power-on-reset (POR)

Power - up Timer (PWRT)

Brown - out Reset (BOR)

• low-power BOR (LPBOR Option)

• Windowed Watchdog Timer (WWDT):

-- Watchdog Reset on too long or too short interval between Watchdog clear events

- Variable prescaler selection

-- Variable window size selection

- All sources configurable in the hardware or software

memory

• Up to 128K Bytes Program Flash Memory

• Up to 3615 Bytes Data SRAM Memory

• Up to 1024 Bytes Data EEPROM

• Programmable Code Protection

• Direct, Indirect and Relative Addressing modes

Job characteristics

• Operating Voltage Range:

1.8 V to 5.5 V

• Temperature Range:

- Industrial: - 40 ℃ to 85 ℃

- Extended: - 40 ℃ to 125 ℃

Energy-saving working mode

• Doze: CPU and Peripherals Running at Different Cycle Rates (attached CPU is lower)

• Idle: CPU hangs While Peripherals operates

• Sleep: Lowest Power Consumption

• Peripheral Module Disable (PMD):

-- Ability to disable hardware module to minimize active power consumption of unusedperipherals

• Extreme low-power mode (XLP)

-- Sleep: 500 nA typical @1.8v

-- Sleep and Watchdog Timer: 900 nA typical @1.8 V

Digital peripherals

• Configurable Logic Cell (CLC) :

-- Integrated combinational and sequential logic

• Complementary Waveform Generator (CWG):

-- Rising and falling edge dead band control

-- full-bridge, half-bridge, 1-channel drive

- Multiple signal sources

• the Capture/Compare/PWM (CCP) modules:

- Two CCPs

-- 16-bit resolution for Capture/Compare modes

-- 10-bit resolution for PWM mode

• 10-bit pulse-width Modulators (PWM):

- Two 10 - bit PWMs

• Serial Communications:

-- Two Enhanced USART (EUSART) with auto-baud Detect, auto-wake up on Start.

RS - 232, RS - 485, LIN compatible

- SPI

- the I2C, SMBus and PMBus ™ compatible

• Up to 35 I/O Pins and One Input Pin:

- Individually programmable pull - ups

- Slew rate control

-- Interrupt-on-change on all pins

-- Input level selection control

• Programmable CRC with Memory Scan:

-- Reliable data/program memory monitoring for fail-safe operation (e.g., Class B)

-- Calculate CRC over any portion of Flash or EEPROM

-- High speed or background operation

• Hardware Limit Timer (tmr2/4/6 +HLT):

-- Hardware monitoring and Fault detection

• Peripheral Pin Select (PPS):

-- Enables pin mapping of digital I/O

• Data Signal Modulator (DSM)

Analog peripherals

• 10-bit Analog to Digital Converter with Computation (ADC2):

- 35 external channels

-- Conversion available during Sleep

-- Four internal analog channels

-- Internal and external trigger options

-- Automated math functions on input signals:

• Averaging, filter calculations, oversampling and threshold comparison

-- 8-bit hardware acquisition timer

• Hardware Capacitive Voltage Divider (CVD) Support:

- 8-bit precharge timer

Adjustable sample-and-hold capacitor array

-- Guard ring digital output drive

• Zero - Cross Detect (ZCD) :

- Detect the when AC signal on the pin crosses the ground

• 5-bit digital-to-analog Converter (DAC):

- the Output available externally

-- Programmable 5-bit voltage (% of VDD,[VREF+ - VREF-], FVR)

-- Internal connections to comparators and ADC

• Two Comparators (CMP) :

- Four external inputs

External output via PPS

• Fixed Voltage Reference (FVR) Module:

-- 1.024v, 2.048v and 4.096v output levels

-- Two buffered outputs: One for DAC/CMP and One for ADC

The clock structure

• high-precision Internal Oscillator Block (HFINTOSC):

-- Selectable frequencies up to 64 MHz

- plus or minus 1% at calibration

• 32 kHz low-power Internal Oscillator (LFINTOSC)

• External 32 kHz Crystal Oscillator (SOSC)

• External high-frequency Oscillator Block:

- Three crystal/resonator modes

-- Digital Clock Input mode

-- 4x PLL with external sources

• Fail - Safe Clock Monitor:

-- Allows for safe shutdown if external clock stops

• Oscillator start-up Timer (OST)

Programmable/debug features

• In - Circuit, Serial Programming ™ (ICSP ™) via Two Pins

• in-circuit Debug (ICD) with Three Breakpoints via Two Pins

•Debug Integrated On Chip

Curiosity Nano evaluation kit for PIC18F47Q10

The PIC18F47Q10 named Nano evaluation kit is a hardware platform to evaluate The PIC18F47Q10microcontroller.

Supported by MPLAB ® X Integrated Development Environment (IDE), the kit provides easy access to thefeatures of the PIC18F47Q10 and explains how both the device into a custom design.

The Curiosity Nano series of evaluation kits include an on-board debugger, and no external tools arenecessary to program The PIC18F47Q10.

The Microchip PIC18F47Q10 Curiosity Nano evaluation kit is a hardware platform to evaluate The PIC18F47Q10 microcontroller.

Curiosity Nano evaluation kit PIC18F47Q10 main features:

• PIC18F47Q10 - I/MP Microcontroller

• One Yellow User LED

• One Mechanical User Switch

• On - Board, the Debugger

- Board identification in MPLAB ® X

-- One green power and status LED

- Programming and was debugging

-- Virtual COM port (CDC)

-- One logic analyzer channel (DGI GPIO)

• USB Powered

• Adjustable Target Voltage

-- MIC5353 regulator controlled by the on-board debugger

-- 1.8-5.1V output voltage (limited by USB input voltage)

-- 500 mA maximum output current (limited by ambient temperature and output voltage)